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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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1 | 2 | /* |
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2 | 3 | * (c) Copyright 2002-2010, Ralink Technology, Inc. |
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3 | 4 | * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it and/or modify |
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6 | | - * it under the terms of the GNU General Public License version 2 |
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7 | | - * as published by the Free Software Foundation |
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8 | | - * |
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9 | | - * This program is distributed in the hope that it will be useful, |
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10 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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12 | | - * GNU General Public License for more details. |
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13 | 5 | */ |
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14 | 6 | #ifndef _MT76X0_PHY_H_ |
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15 | 7 | #define _MT76X0_PHY_H_ |
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16 | 8 | |
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17 | | -#define RF_G_BAND 0x0100 |
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18 | | -#define RF_A_BAND 0x0200 |
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| 9 | +#define RF_G_BAND 0x0100 |
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| 10 | +#define RF_A_BAND 0x0200 |
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19 | 11 | #define RF_A_BAND_LB 0x0400 |
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20 | 12 | #define RF_A_BAND_MB 0x0800 |
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21 | 13 | #define RF_A_BAND_HB 0x1000 |
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.. | .. |
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26 | 18 | #define RF_BW_10 4 |
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27 | 19 | #define RF_BW_80 8 |
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28 | 20 | |
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29 | | -#define MT_RF(bank, reg) ((bank) << 16 | (reg)) |
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30 | | -#define MT_RF_BANK(offset) (offset >> 16) |
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31 | | -#define MT_RF_REG(offset) (offset & 0xff) |
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| 21 | +#define MT_RF(bank, reg) ((bank) << 16 | (reg)) |
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| 22 | +#define MT_RF_BANK(offset) ((offset) >> 16) |
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| 23 | +#define MT_RF_REG(offset) ((offset) & 0xff) |
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| 24 | + |
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| 25 | +#define MT_RF_VCO_BP_CLOSE_LOOP BIT(3) |
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| 26 | +#define MT_RF_VCO_BP_CLOSE_LOOP_MASK GENMASK(3, 0) |
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| 27 | +#define MT_RF_VCO_CAL_MASK GENMASK(2, 0) |
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| 28 | +#define MT_RF_START_TIME 0x3 |
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| 29 | +#define MT_RF_START_TIME_MASK GENMASK(2, 0) |
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| 30 | +#define MT_RF_SETTLE_TIME_MASK GENMASK(6, 4) |
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| 31 | + |
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| 32 | +#define MT_RF_PLL_DEN_MASK GENMASK(4, 0) |
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| 33 | +#define MT_RF_PLL_K_MASK GENMASK(4, 0) |
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| 34 | +#define MT_RF_SDM_RESET_MASK BIT(7) |
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| 35 | +#define MT_RF_SDM_MASH_PRBS_MASK GENMASK(6, 2) |
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| 36 | +#define MT_RF_SDM_BP_MASK BIT(1) |
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| 37 | +#define MT_RF_ISI_ISO_MASK GENMASK(7, 6) |
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| 38 | +#define MT_RF_PFD_DLY_MASK GENMASK(5, 4) |
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| 39 | +#define MT_RF_CLK_SEL_MASK GENMASK(3, 2) |
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| 40 | +#define MT_RF_XO_DIV_MASK GENMASK(1, 0) |
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32 | 41 | |
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33 | 42 | struct mt76x0_bbp_switch_item { |
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34 | 43 | u16 bw_band; |
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