hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h
....@@ -1,16 +1,9 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23 * (c) Copyright 2002-2010, Ralink Technology, Inc.
34 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
45 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
5
- *
6
- * This program is free software; you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License version 2
8
- * as published by the Free Software Foundation
9
- *
10
- * This program is distributed in the hope that it will be useful,
11
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
12
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
- * GNU General Public License for more details.
6
+ * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
147 */
158
169 #ifndef __MT76X0U_INITVALS_H
....@@ -18,265 +11,75 @@
1811
1912 #include "phy.h"
2013
21
-static const struct mt76_reg_pair common_mac_reg_table[] = {
22
-#if 1
23
- {MT_BCN_OFFSET(0), 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
24
- {MT_BCN_OFFSET(1), 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
25
-#endif
26
-
27
- {MT_LEGACY_BASIC_RATE, 0x0000013f}, /* Basic rate set bitmap*/
28
- {MT_HT_BASIC_RATE, 0x00008003}, /* Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.*/
29
- {MT_MAC_SYS_CTRL, 0x00}, /* 0x1004, , default Disable RX*/
30
- {MT_RX_FILTR_CFG, 0x17f97}, /*0x1400 , RX filter control, */
31
- {MT_BKOFF_SLOT_CFG, 0x209}, /* default set short slot time, CC_DELAY_TIME should be 2 */
32
- /*{TX_SW_CFG0, 0x40a06}, Gary,2006-08-23 */
33
- {MT_TX_SW_CFG0, 0x0}, /* Gary,2008-05-21 for CWC test */
34
- {MT_TX_SW_CFG1, 0x80606}, /* Gary,2006-08-23 */
35
- {MT_TX_LINK_CFG, 0x1020}, /* Gary,2006-08-23 */
36
- /*{TX_TIMEOUT_CFG, 0x00182090}, CCK has some problem. So increase timieout value. 2006-10-09 MArvek RT*/
37
- {MT_TX_TIMEOUT_CFG, 0x000a2090}, /* CCK has some problem. So increase timieout value. 2006-10-09 MArvek RT , Modify for 2860E ,2007-08-01*/
38
- {MT_MAX_LEN_CFG, 0xa0fff | 0x00001000}, /* 0x3018, MAX frame length. Max PSDU = 16kbytes.*/
39
- {MT_LED_CFG, 0x7f031e46}, /* Gary, 2006-08-23*/
40
-
41
- {MT_PBF_TX_MAX_PCNT, 0x1fbf1f1f /*0xbfbf3f1f*/},
42
- {MT_PBF_RX_MAX_PCNT, 0x9f},
43
-
44
- /*{TX_RTY_CFG, 0x6bb80408}, Jan, 2006/11/16*/
45
-/* WMM_ACM_SUPPORT */
46
-/* {TX_RTY_CFG, 0x6bb80101}, sample*/
47
- {MT_TX_RETRY_CFG, 0x47d01f0f}, /* Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03*/
48
-
49
- {MT_AUTO_RSP_CFG, 0x00000013}, /* Initial Auto_Responder, because QA will turn off Auto-Responder*/
50
- {MT_CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, /* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
51
- {MT_OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, /* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
52
- {MT_PBF_CFG, 0xf40006}, /* Only enable Queue 2*/
53
- {MT_MM40_PROT_CFG, 0x3F44084}, /* Initial Auto_Responder, because QA will turn off Auto-Responder*/
54
- {MT_WPDMA_GLO_CFG, 0x00000030},
55
- {MT_GF20_PROT_CFG, 0x01744004}, /* set 19:18 --> Short NAV for MIMO PS*/
56
- {MT_GF40_PROT_CFG, 0x03F44084},
57
- {MT_MM20_PROT_CFG, 0x01744004},
58
- {MT_TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, /*Extension channel backoff.*/
59
- {MT_TX_RTS_CFG, 0x00092b20},
60
-
61
- {MT_EXP_ACK_TIME, 0x002400ca}, /* default value */
62
- {MT_TXOP_HLDR_ET, 0x00000002},
63
-
64
- /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
65
- is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
66
- and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
67
- will always lost. So we change the SIFS of CCK from 10us to 16us. */
68
- {MT_XIFS_TIME_CFG, 0x33a41010},
69
- {MT_PWR_PIN_CFG, 0x00000000},
70
-};
71
-
72
-static const struct mt76_reg_pair mt76x0_mac_reg_table[] = {
73
- /* {MT_IOCFG_6, 0xA0040080 }, */
74
- {MT_PBF_SYS_CTRL, 0x00080c00 },
75
- {MT_PBF_CFG, 0x77723c1f },
76
- {MT_FCE_PSE_CTRL, 0x00000001 },
77
-
78
- {MT_AMPDU_MAX_LEN_20M1S, 0xBAA99887 },
79
-
80
- /* Delay bb_tx_pe for proper tx_mcs_pwr update */
81
- {MT_TX_SW_CFG0, 0x00000601 },
82
-
83
- /* Set rf_tx_pe deassert time to 1us by Chee's comment @MT7650_CR_setting_1018.xlsx */
84
- {MT_TX_SW_CFG1, 0x00040000 },
85
- {MT_TX_SW_CFG2, 0x00000000 },
86
-
87
- /* disable Tx info report */
88
- {0xa44, 0x0000000 },
89
-
90
- {MT_HEADER_TRANS_CTRL_REG, 0x0},
91
- {MT_TSO_CTRL, 0x0},
92
-
93
- /* BB_PA_MODE_CFG0(0x1214) Keep default value @20120903 */
94
- {MT_BB_PA_MODE_CFG1, 0x00500055},
95
-
96
- /* RF_PA_MODE_CFG0(0x121C) Keep default value @20120903 */
97
- {MT_RF_PA_MODE_CFG1, 0x00500055},
98
-
99
- {MT_TX_ALC_CFG_0, 0x2F2F000C},
100
- {MT_TX0_BB_GAIN_ATTEN, 0x00000000}, /* set BBP atten gain = 0 */
101
-
102
- {MT_TX_PWR_CFG_0, 0x3A3A3A3A},
103
- {MT_TX_PWR_CFG_1, 0x3A3A3A3A},
104
- {MT_TX_PWR_CFG_2, 0x3A3A3A3A},
105
- {MT_TX_PWR_CFG_3, 0x3A3A3A3A},
106
- {MT_TX_PWR_CFG_4, 0x3A3A3A3A},
107
- {MT_TX_PWR_CFG_7, 0x3A3A3A3A},
108
- {MT_TX_PWR_CFG_8, 0x3A},
109
- {MT_TX_PWR_CFG_9, 0x3A},
110
- /* Enable Tx length > 4095 byte */
111
- {0x150C, 0x00000002},
112
-
113
- /* Disable bt_abort_tx_en(0x1238[21] = 0) which is not used at MT7650 */
114
- {0x1238, 0x001700C8},
115
- /* PMU_OCLEVEL<5:1> from default <5'b10010> to <5'b11011> for normal driver */
116
- /* {MT_LDO_CTRL_0, 0x00A647B6}, */
117
-
118
- /* Default LDO_DIG supply 1.26V, change to 1.2V */
119
- {MT_LDO_CTRL_1, 0x6B006464 },
120
-/*
121
- {MT_HT_BASIC_RATE, 0x00004003 },
122
- {MT_HT_CTRL_CFG, 0x000001FF },
123
-*/
124
-};
125
-
126
-
127
-static const struct mt76_reg_pair mt76x0_bbp_init_tab[] = {
128
- {MT_BBP(CORE, 1), 0x00000002},
129
- {MT_BBP(CORE, 4), 0x00000000},
130
- {MT_BBP(CORE, 24), 0x00000000},
131
- {MT_BBP(CORE, 32), 0x4003000a},
132
- {MT_BBP(CORE, 42), 0x00000000},
133
- {MT_BBP(CORE, 44), 0x00000000},
134
-
135
- {MT_BBP(IBI, 11), 0x00000080},
136
-
137
- /*
138
- 0x2300[5] Default Antenna:
139
- 0 for WIFI main antenna
140
- 1 for WIFI aux antenna
141
-
142
- */
143
- {MT_BBP(AGC, 0), 0x00021400},
144
- {MT_BBP(AGC, 1), 0x00000003},
145
- {MT_BBP(AGC, 2), 0x003A6464},
146
- {MT_BBP(AGC, 15), 0x88A28CB8},
147
- {MT_BBP(AGC, 22), 0x00001E21},
148
- {MT_BBP(AGC, 23), 0x0000272C},
149
- {MT_BBP(AGC, 24), 0x00002F3A},
150
- {MT_BBP(AGC, 25), 0x8000005A},
151
- {MT_BBP(AGC, 26), 0x007C2005},
152
- {MT_BBP(AGC, 34), 0x000A0C0C},
153
- {MT_BBP(AGC, 37), 0x2121262C},
154
- {MT_BBP(AGC, 41), 0x38383E45},
155
- {MT_BBP(AGC, 57), 0x00001010},
156
- {MT_BBP(AGC, 59), 0xBAA20E96},
157
- {MT_BBP(AGC, 63), 0x00000001},
158
-
159
- {MT_BBP(TXC, 0), 0x00280403},
160
- {MT_BBP(TXC, 1), 0x00000000},
161
-
162
- {MT_BBP(RXC, 1), 0x00000012},
163
- {MT_BBP(RXC, 2), 0x00000011},
164
- {MT_BBP(RXC, 3), 0x00000005},
165
- {MT_BBP(RXC, 4), 0x00000000},
166
- {MT_BBP(RXC, 5), 0xF977C4EC},
167
- {MT_BBP(RXC, 7), 0x00000090},
168
-
169
- {MT_BBP(TXO, 8), 0x00000000},
170
-
171
- {MT_BBP(TXBE, 0), 0x00000000},
172
- {MT_BBP(TXBE, 4), 0x00000004},
173
- {MT_BBP(TXBE, 6), 0x00000000},
174
- {MT_BBP(TXBE, 8), 0x00000014},
175
- {MT_BBP(TXBE, 9), 0x20000000},
176
- {MT_BBP(TXBE, 10), 0x00000000},
177
- {MT_BBP(TXBE, 12), 0x00000000},
178
- {MT_BBP(TXBE, 13), 0x00000000},
179
- {MT_BBP(TXBE, 14), 0x00000000},
180
- {MT_BBP(TXBE, 15), 0x00000000},
181
- {MT_BBP(TXBE, 16), 0x00000000},
182
- {MT_BBP(TXBE, 17), 0x00000000},
183
-
184
- {MT_BBP(RXFE, 1), 0x00008800}, /* Add for E3 */
185
- {MT_BBP(RXFE, 3), 0x00000000},
186
- {MT_BBP(RXFE, 4), 0x00000000},
187
-
188
- {MT_BBP(RXO, 13), 0x00000092},
189
- {MT_BBP(RXO, 14), 0x00060612},
190
- {MT_BBP(RXO, 15), 0xC8321B18},
191
- {MT_BBP(RXO, 16), 0x0000001E},
192
- {MT_BBP(RXO, 17), 0x00000000},
193
- {MT_BBP(RXO, 18), 0xCC00A993},
194
- {MT_BBP(RXO, 19), 0xB9CB9CB9},
195
- {MT_BBP(RXO, 20), 0x26c00057},
196
- {MT_BBP(RXO, 21), 0x00000001},
197
- {MT_BBP(RXO, 24), 0x00000006},
198
-};
199
-
20014 static const struct mt76x0_bbp_switch_item mt76x0_bbp_switch_tab[] = {
201
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 8), 0x0E344EF0}},
202
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 8), 0x122C54F2}},
15
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 4), 0x1FEDA049 } },
16
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 4), 0x1FECA054 } },
20317
204
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 14), 0x310F2E39}},
205
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 14), 0x310F2A3F}},
18
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 6), 0x00000045 } },
19
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 6), 0x0000000A } },
20620
207
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 32), 0x00003230}},
208
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 32), 0x0000181C}},
21
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 8), 0x16344EF0 } },
22
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 8), 0x122C54F2 } },
20923
210
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 33), 0x00003240}},
211
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 33), 0x00003218}},
24
+ { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 12), 0x05052879 } },
25
+ { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 12), 0x050528F9 } },
26
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 12), 0x050528F9 } },
21227
213
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 35), 0x11112016}},
214
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 35), 0x11112016}},
28
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 13), 0x35050004 } },
29
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 13), 0x2C3A0406 } },
21530
216
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(RXO, 28), 0x0000008A}},
217
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(RXO, 28), 0x0000008A}},
31
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 14), 0x310F2E3C } },
32
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 14), 0x310F2A3F } },
21833
219
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 4), 0x1FEDA049}},
220
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 4), 0x1FECA054}},
34
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 26), 0x007C2005 } },
35
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 26), 0x007C2005 } },
22136
222
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 6), 0x00000045}},
223
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 6), 0x0000000A}},
37
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 27), 0x000000E1 } },
38
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 27), 0x000000EC } },
22439
225
- {RF_G_BAND | RF_BW_20, {MT_BBP(AGC, 12), 0x05052879}},
226
- {RF_G_BAND | RF_BW_40, {MT_BBP(AGC, 12), 0x050528F9}},
227
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 12), 0x050528F9}},
40
+ { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 28), 0x00060806 } },
41
+ { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 28), 0x00050806 } },
42
+ { RF_A_BAND | RF_BW_40, { MT_BBP(AGC, 28), 0x00060801 } },
43
+ { RF_A_BAND | RF_BW_20 | RF_BW_80, { MT_BBP(AGC, 28), 0x00060806 } },
22844
229
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 13), 0x35050004}},
230
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 13), 0x2C3A0406}},
45
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(RXO, 28), 0x0000008A } },
23146
232
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 27), 0x000000E1}},
233
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 27), 0x000000EC}},
47
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 31), 0x00000E23 } },
48
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 31), 0x00000E13 } },
23449
235
- {RF_G_BAND | RF_BW_20, {MT_BBP(AGC, 28), 0x00060806}},
236
- {RF_G_BAND | RF_BW_40, {MT_BBP(AGC, 28), 0x00050806}},
237
- {RF_A_BAND | RF_BW_40, {MT_BBP(AGC, 28), 0x00060801}},
238
- {RF_A_BAND | RF_BW_20 | RF_BW_80, {MT_BBP(AGC, 28), 0x00060806}},
50
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 32), 0x00003218 } },
51
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 32), 0x0000181C } },
23952
240
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 31), 0x00000F23}},
241
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 31), 0x00000F13}},
53
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 33), 0x00003240 } },
54
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 33), 0x00003218 } },
24255
243
- {RF_G_BAND | RF_BW_20, {MT_BBP(AGC, 39), 0x2A2A3036}},
244
- {RF_G_BAND | RF_BW_40, {MT_BBP(AGC, 39), 0x2A2A2C36}},
245
- {RF_A_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 39), 0x2A2A3036}},
246
- {RF_A_BAND | RF_BW_80, {MT_BBP(AGC, 39), 0x2A2A2A36}},
56
+ { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 35), 0x11111616 } },
57
+ { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 35), 0x11111516 } },
58
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 35), 0x11111111 } },
24759
248
- {RF_G_BAND | RF_BW_20, {MT_BBP(AGC, 43), 0x27273438}},
249
- {RF_G_BAND | RF_BW_40, {MT_BBP(AGC, 43), 0x27272D38}},
250
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 43), 0x27272B30}},
60
+ { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 39), 0x2A2A3036 } },
61
+ { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 39), 0x2A2A2C36 } },
62
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 39), 0x2A2A2A2A } },
25163
252
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 51), 0x17171C1C}},
253
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 51), 0xFFFFFFFF}},
64
+ { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 43), 0x27273438 } },
65
+ { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 43), 0x27272D38 } },
66
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 43), 0x27271A1A } },
25467
255
- {RF_G_BAND | RF_BW_20, {MT_BBP(AGC, 53), 0x26262A2F}},
256
- {RF_G_BAND | RF_BW_40, {MT_BBP(AGC, 53), 0x2626322F}},
257
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 53), 0xFFFFFFFF}},
68
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 51), 0x17171C1C } },
69
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 51), 0xFFFFFFFF } },
25870
259
- {RF_G_BAND | RF_BW_20, {MT_BBP(AGC, 55), 0x40404E58}},
260
- {RF_G_BAND | RF_BW_40, {MT_BBP(AGC, 55), 0x40405858}},
261
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 55), 0xFFFFFFFF}},
71
+ { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 53), 0x26262A2F } },
72
+ { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 53), 0x2626322F } },
73
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 53), 0xFFFFFFFF } },
26274
263
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(AGC, 58), 0x00001010}},
264
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(AGC, 58), 0x00000000}},
75
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 55), 0x40404040 } },
76
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 55), 0xFFFFFFFF } },
26577
266
- {RF_G_BAND | RF_BW_20 | RF_BW_40, {MT_BBP(RXFE, 0), 0x3D5000E0}},
267
- {RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {MT_BBP(RXFE, 0), 0x895000E0}},
268
-};
78
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 58), 0x00001010 } },
79
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 58), 0x00000000 } },
26980
270
-static const struct mt76_reg_pair mt76x0_dcoc_tab[] = {
271
- {MT_BBP(CAL, 47), 0x000010F0 },
272
- {MT_BBP(CAL, 48), 0x00008080 },
273
- {MT_BBP(CAL, 49), 0x00000F07 },
274
- {MT_BBP(CAL, 50), 0x00000040 },
275
- {MT_BBP(CAL, 51), 0x00000404 },
276
- {MT_BBP(CAL, 52), 0x00080803 },
277
- {MT_BBP(CAL, 53), 0x00000704 },
278
- {MT_BBP(CAL, 54), 0x00002828 },
279
- {MT_BBP(CAL, 55), 0x00005050 },
81
+ { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(RXFE, 0), 0x3D5000E0 } },
82
+ { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(RXFE, 0), 0x895000E0 } },
28083 };
28184
28285 #endif