hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/net/phy/swphy.c
....@@ -1,17 +1,13 @@
1
+// SPDX-License-Identifier: GPL-2.0+
12 /*
23 * Software PHY emulation
34 *
4
- * Code taken from fixed_phy.c by Russell King <rmk+kernel@arm.linux.org.uk>
5
+ * Code taken from fixed_phy.c by Russell King.
56 *
67 * Author: Vitaly Bordug <vbordug@ru.mvista.com>
78 * Anton Vorontsov <avorontsov@ru.mvista.com>
89 *
910 * Copyright (c) 2006-2007 MontaVista Software, Inc.
10
- *
11
- * This program is free software; you can redistribute it and/or modify it
12
- * under the terms of the GNU General Public License as published by the
13
- * Free Software Foundation; either version 2 of the License, or (at your
14
- * option) any later version.
1511 */
1612 #include <linux/export.h>
1713 #include <linux/mii.h>
....@@ -23,10 +19,10 @@
2319 #define MII_REGS_NUM 29
2420
2521 struct swmii_regs {
26
- u16 bmcr;
2722 u16 bmsr;
2823 u16 lpa;
2924 u16 lpagb;
25
+ u16 estat;
3026 };
3127
3228 enum {
....@@ -44,33 +40,31 @@
4440 */
4541 static const struct swmii_regs speed[] = {
4642 [SWMII_SPEED_10] = {
47
- .bmcr = BMCR_FULLDPLX,
4843 .lpa = LPA_10FULL | LPA_10HALF,
4944 },
5045 [SWMII_SPEED_100] = {
51
- .bmcr = BMCR_FULLDPLX | BMCR_SPEED100,
5246 .bmsr = BMSR_100FULL | BMSR_100HALF,
5347 .lpa = LPA_100FULL | LPA_100HALF,
5448 },
5549 [SWMII_SPEED_1000] = {
56
- .bmcr = BMCR_FULLDPLX | BMCR_SPEED1000,
5750 .bmsr = BMSR_ESTATEN,
5851 .lpagb = LPA_1000FULL | LPA_1000HALF,
52
+ .estat = ESTATUS_1000_TFULL | ESTATUS_1000_THALF,
5953 },
6054 };
6155
6256 static const struct swmii_regs duplex[] = {
6357 [SWMII_DUPLEX_HALF] = {
64
- .bmcr = ~BMCR_FULLDPLX,
6558 .bmsr = BMSR_ESTATEN | BMSR_100HALF,
6659 .lpa = LPA_10HALF | LPA_100HALF,
6760 .lpagb = LPA_1000HALF,
61
+ .estat = ESTATUS_1000_THALF,
6862 },
6963 [SWMII_DUPLEX_FULL] = {
70
- .bmcr = ~0,
7164 .bmsr = BMSR_ESTATEN | BMSR_100FULL,
7265 .lpa = LPA_10FULL | LPA_100FULL,
7366 .lpagb = LPA_1000FULL,
67
+ .estat = ESTATUS_1000_TFULL,
7468 },
7569 };
7670
....@@ -122,7 +116,7 @@
122116 {
123117 int speed_index, duplex_index;
124118 u16 bmsr = BMSR_ANEGCAPABLE;
125
- u16 bmcr = 0;
119
+ u16 estat = 0;
126120 u16 lpagb = 0;
127121 u16 lpa = 0;
128122
....@@ -136,11 +130,11 @@
136130 duplex_index = state->duplex ? SWMII_DUPLEX_FULL : SWMII_DUPLEX_HALF;
137131
138132 bmsr |= speed[speed_index].bmsr & duplex[duplex_index].bmsr;
133
+ estat |= speed[speed_index].estat & duplex[duplex_index].estat;
139134
140135 if (state->link) {
141136 bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
142137
143
- bmcr |= speed[speed_index].bmcr & duplex[duplex_index].bmcr;
144138 lpa |= speed[speed_index].lpa & duplex[duplex_index].lpa;
145139 lpagb |= speed[speed_index].lpagb & duplex[duplex_index].lpagb;
146140
....@@ -153,7 +147,7 @@
153147
154148 switch (reg) {
155149 case MII_BMCR:
156
- return bmcr;
150
+ return BMCR_ANENABLE;
157151 case MII_BMSR:
158152 return bmsr;
159153 case MII_PHYSID1:
....@@ -163,6 +157,8 @@
163157 return lpa;
164158 case MII_STAT1000:
165159 return lpagb;
160
+ case MII_ESTATUS:
161
+ return estat;
166162
167163 /*
168164 * We do not support emulating Clause 45 over Clause 22 register