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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2017 Free Electrons |
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3 | 4 | * Copyright (C) 2017 NextThing Co |
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4 | 5 | * |
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5 | 6 | * Author: Boris Brezillon <boris.brezillon@free-electrons.com> |
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6 | | - * |
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7 | | - * This program is free software; you can redistribute it and/or modify |
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8 | | - * it under the terms of the GNU General Public License as published by |
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9 | | - * the Free Software Foundation; either version 2 of the License, or |
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10 | | - * (at your option) any later version. |
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11 | | - * |
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12 | | - * This program is distributed in the hope that it will be useful, |
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13 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 | | - * GNU General Public License for more details. |
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16 | 7 | */ |
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17 | 8 | |
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18 | | -#include <linux/mtd/rawnand.h> |
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| 9 | +#include "internals.h" |
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19 | 10 | |
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20 | 11 | static void amd_nand_decode_id(struct nand_chip *chip) |
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21 | 12 | { |
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22 | 13 | struct mtd_info *mtd = nand_to_mtd(chip); |
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| 14 | + struct nand_memory_organization *memorg; |
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| 15 | + |
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| 16 | + memorg = nanddev_get_memorg(&chip->base); |
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23 | 17 | |
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24 | 18 | nand_decode_ext_id(chip); |
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25 | 19 | |
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.. | .. |
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31 | 25 | */ |
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32 | 26 | if (chip->id.data[4] != 0x00 && chip->id.data[5] == 0x00 && |
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33 | 27 | chip->id.data[6] == 0x00 && chip->id.data[7] == 0x00 && |
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34 | | - mtd->writesize == 512) { |
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35 | | - mtd->erasesize = 128 * 1024; |
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36 | | - mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1); |
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| 28 | + memorg->pagesize == 512) { |
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| 29 | + memorg->pages_per_eraseblock = 256; |
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| 30 | + memorg->pages_per_eraseblock <<= ((chip->id.data[3] & 0x03) << 1); |
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| 31 | + mtd->erasesize = memorg->pages_per_eraseblock * |
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| 32 | + memorg->pagesize; |
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37 | 33 | } |
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38 | 34 | } |
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39 | 35 | |
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40 | 36 | static int amd_nand_init(struct nand_chip *chip) |
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41 | 37 | { |
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42 | 38 | if (nand_is_slc(chip)) |
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43 | | - chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
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| 39 | + /* |
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| 40 | + * According to the datasheet of some Cypress SLC NANDs, |
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| 41 | + * the bad block markers can be in the first, second or last |
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| 42 | + * page of a block. So let's check all three locations. |
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| 43 | + */ |
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| 44 | + chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE | |
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| 45 | + NAND_BBM_LASTPAGE; |
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44 | 46 | |
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45 | 47 | return 0; |
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46 | 48 | } |
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