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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c
....@@ -1,12 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * BCM47XX NAND flash driver
34  *
45  * Copyright (C) 2012 Rafał Miłecki <zajec5@gmail.com>
5
- *
6
- * This program is free software; you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License version 2 as
8
- * published by the Free Software Foundation.
9
- *
106  */
117 
128 #include "bcm47xxnflash.h"
....@@ -170,10 +166,9 @@
170166  * NAND chip ops
171167  **************************************************/
172168 
173
-static void bcm47xxnflash_ops_bcm4706_cmd_ctrl(struct mtd_info *mtd, int cmd,
174
-					       unsigned int ctrl)
169
+static void bcm47xxnflash_ops_bcm4706_cmd_ctrl(struct nand_chip *nand_chip,
170
+					       int cmd, unsigned int ctrl)
175171 {
176
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
177172 	struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip);
178173 	u32 code = 0;
179174 
....@@ -191,15 +186,14 @@
191186 }
192187 
193188 /* Default nand_select_chip calls cmd_ctrl, which is not used in BCM4706 */
194
-static void bcm47xxnflash_ops_bcm4706_select_chip(struct mtd_info *mtd,
195
-						  int chip)
189
+static void bcm47xxnflash_ops_bcm4706_select_chip(struct nand_chip *chip,
190
+						  int cs)
196191 {
197192 	return;
198193 }
199194 
200
-static int bcm47xxnflash_ops_bcm4706_dev_ready(struct mtd_info *mtd)
195
+static int bcm47xxnflash_ops_bcm4706_dev_ready(struct nand_chip *nand_chip)
201196 {
202
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
203197 	struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip);
204198 
205199 	return !!(bcma_cc_read32(b47n->cc, BCMA_CC_NFLASH_CTL) & NCTL_READY);
....@@ -212,11 +206,11 @@
212206  * registers of ChipCommon core. Hacking cmd_ctrl to understand and convert
213207  * standard commands would be much more complicated.
214208  */
215
-static void bcm47xxnflash_ops_bcm4706_cmdfunc(struct mtd_info *mtd,
209
+static void bcm47xxnflash_ops_bcm4706_cmdfunc(struct nand_chip *nand_chip,
216210 					      unsigned command, int column,
217211 					      int page_addr)
218212 {
219
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
213
+	struct mtd_info *mtd = nand_to_mtd(nand_chip);
220214 	struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip);
221215 	struct bcma_drv_cc *cc = b47n->cc;
222216 	u32 ctlcode;
....@@ -229,10 +223,10 @@
229223 
230224 	switch (command) {
231225 	case NAND_CMD_RESET:
232
-		nand_chip->cmd_ctrl(mtd, command, NAND_CTRL_CLE);
226
+		nand_chip->legacy.cmd_ctrl(nand_chip, command, NAND_CTRL_CLE);
233227 
234228 		ndelay(100);
235
-		nand_wait_ready(mtd);
229
+		nand_wait_ready(nand_chip);
236230 		break;
237231 	case NAND_CMD_READID:
238232 		ctlcode = NCTL_CSA | 0x01000000 | NCTL_CMD1W | NCTL_CMD0;
....@@ -310,9 +304,9 @@
310304 	b47n->curr_command = command;
311305 }
312306 
313
-static u8 bcm47xxnflash_ops_bcm4706_read_byte(struct mtd_info *mtd)
307
+static u8 bcm47xxnflash_ops_bcm4706_read_byte(struct nand_chip *nand_chip)
314308 {
315
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
309
+	struct mtd_info *mtd = nand_to_mtd(nand_chip);
316310 	struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip);
317311 	struct bcma_drv_cc *cc = b47n->cc;
318312 	u32 tmp = 0;
....@@ -338,31 +332,31 @@
338332 	return 0;
339333 }
340334 
341
-static void bcm47xxnflash_ops_bcm4706_read_buf(struct mtd_info *mtd,
335
+static void bcm47xxnflash_ops_bcm4706_read_buf(struct nand_chip *nand_chip,
342336 					       uint8_t *buf, int len)
343337 {
344
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
345338 	struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip);
346339 
347340 	switch (b47n->curr_command) {
348341 	case NAND_CMD_READ0:
349342 	case NAND_CMD_READOOB:
350
-		bcm47xxnflash_ops_bcm4706_read(mtd, buf, len);
343
+		bcm47xxnflash_ops_bcm4706_read(nand_to_mtd(nand_chip), buf,
344
+					       len);
351345 		return;
352346 	}
353347 
354348 	pr_err("Invalid command for buf read: 0x%X\n", b47n->curr_command);
355349 }
356350 
357
-static void bcm47xxnflash_ops_bcm4706_write_buf(struct mtd_info *mtd,
351
+static void bcm47xxnflash_ops_bcm4706_write_buf(struct nand_chip *nand_chip,
358352 						const uint8_t *buf, int len)
359353 {
360
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
361354 	struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip);
362355 
363356 	switch (b47n->curr_command) {
364357 	case NAND_CMD_SEQIN:
365
-		bcm47xxnflash_ops_bcm4706_write(mtd, buf, len);
358
+		bcm47xxnflash_ops_bcm4706_write(nand_to_mtd(nand_chip), buf,
359
+						len);
366360 		return;
367361 	}
368362 
....@@ -385,19 +379,20 @@
385379 	u8 tbits, col_bits, col_size, row_bits, row_bsize;
386380 	u32 val;
387381 
388
-	b47n->nand_chip.select_chip = bcm47xxnflash_ops_bcm4706_select_chip;
389
-	nand_chip->cmd_ctrl = bcm47xxnflash_ops_bcm4706_cmd_ctrl;
390
-	nand_chip->dev_ready = bcm47xxnflash_ops_bcm4706_dev_ready;
391
-	b47n->nand_chip.cmdfunc = bcm47xxnflash_ops_bcm4706_cmdfunc;
392
-	b47n->nand_chip.read_byte = bcm47xxnflash_ops_bcm4706_read_byte;
393
-	b47n->nand_chip.read_buf = bcm47xxnflash_ops_bcm4706_read_buf;
394
-	b47n->nand_chip.write_buf = bcm47xxnflash_ops_bcm4706_write_buf;
395
-	b47n->nand_chip.set_features = nand_get_set_features_notsupp;
396
-	b47n->nand_chip.get_features = nand_get_set_features_notsupp;
382
+	nand_chip->legacy.select_chip = bcm47xxnflash_ops_bcm4706_select_chip;
383
+	nand_chip->legacy.cmd_ctrl = bcm47xxnflash_ops_bcm4706_cmd_ctrl;
384
+	nand_chip->legacy.dev_ready = bcm47xxnflash_ops_bcm4706_dev_ready;
385
+	b47n->nand_chip.legacy.cmdfunc = bcm47xxnflash_ops_bcm4706_cmdfunc;
386
+	b47n->nand_chip.legacy.read_byte = bcm47xxnflash_ops_bcm4706_read_byte;
387
+	b47n->nand_chip.legacy.read_buf = bcm47xxnflash_ops_bcm4706_read_buf;
388
+	b47n->nand_chip.legacy.write_buf = bcm47xxnflash_ops_bcm4706_write_buf;
389
+	b47n->nand_chip.legacy.set_features = nand_get_set_features_notsupp;
390
+	b47n->nand_chip.legacy.get_features = nand_get_set_features_notsupp;
397391 
398
-	nand_chip->chip_delay = 50;
392
+	nand_chip->legacy.chip_delay = 50;
399393 	b47n->nand_chip.bbt_options = NAND_BBT_USE_FLASH;
400
-	b47n->nand_chip.ecc.mode = NAND_ECC_NONE; /* TODO: implement ECC */
394
+	/* TODO: implement ECC */
395
+	b47n->nand_chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_NONE;
401396 
402397 	/* Enable NAND flash access */
403398 	bcma_cc_set32(b47n->cc, BCMA_CC_4706_FLASHSCFG,
....@@ -430,7 +425,7 @@
430425 	}
431426 
432427 	/* Configure FLASH */
433
-	chipsize = b47n->nand_chip.chipsize >> 20;
428
+	chipsize = nanddev_target_size(&b47n->nand_chip.base) >> 20;
434429 	tbits = ffs(chipsize); /* find first bit set */
435430 	if (!tbits || tbits != fls(chipsize)) {
436431 		pr_err("Invalid flash size: 0x%lX\n", chipsize);