add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/media/rc/ir-hix5hd2.c
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..
@@ -1,10 +1,7 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (c) 2014 Linaro Ltd.
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  * Copyright (c) 2014 Hisilicon Limited.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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  */
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6
 
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 #include <linux/clk.h>
..
..
@@ -40,9 +37,12 @@
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 #define INT_CLR_RCV		BIT(16)
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 #define INT_CLR_RCVTIMEOUT	(BIT(16) | BIT(17))
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39
 
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-#define IR_CLK			0x48
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 #define IR_CLK_ENABLE		BIT(4)
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 #define IR_CLK_RESET		BIT(5)
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+
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+/* IR_ENABLE register bits */
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+#define IR_ENABLE_EN		BIT(0)
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+#define IR_ENABLE_EN_EXTRA	BIT(8)
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46
 
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 #define IR_CFG_WIDTH_MASK	0xffff
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 #define IR_CFG_WIDTH_SHIFT	16
..
..
@@ -61,6 +61,23 @@
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61
 
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 #define IR_HIX5HD2_NAME		"hix5hd2-ir"
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63
 
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+/* Need to set extra bit for enabling IR */
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+#define HIX5HD2_FLAG_EXTRA_ENABLE	BIT(0)
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+
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+struct hix5hd2_soc_data {
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+	u32 clk_reg;
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+	u32 flags;
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+};
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+
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+static const struct hix5hd2_soc_data hix5hd2_data = {
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+	.clk_reg = 0x48,
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+};
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+
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+static const struct hix5hd2_soc_data hi3796cv300_data = {
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+	.clk_reg = 0x60,
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+	.flags = HIX5HD2_FLAG_EXTRA_ENABLE,
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+};
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+
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 struct hix5hd2_ir_priv {
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 	int			irq;
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 	void __iomem		*base;
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..
@@ -69,15 +86,17 @@
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 	struct regmap		*regmap;
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 	struct clk		*clock;
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 	unsigned long		rate;
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+	const struct hix5hd2_soc_data *socdata;
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 };
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91
 
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-static int hix5hd2_ir_enable(struct hix5hd2_ir_priv *dev, bool on)
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+static int hix5hd2_ir_clk_enable(struct hix5hd2_ir_priv *dev, bool on)
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 {
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+	u32 clk_reg = dev->socdata->clk_reg;
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 	u32 val;
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 	int ret = 0;
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 	if (dev->regmap) {
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-		regmap_read(dev->regmap, IR_CLK, &val);
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+		regmap_read(dev->regmap, clk_reg, &val);
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 		if (on) {
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 			val &= ~IR_CLK_RESET;
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 			val |= IR_CLK_ENABLE;
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@@ -85,7 +104,7 @@
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 			val &= ~IR_CLK_ENABLE;
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 			val |= IR_CLK_RESET;
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 		}
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-		regmap_write(dev->regmap, IR_CLK, val);
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+		regmap_write(dev->regmap, clk_reg, val);
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 	} else {
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 		if (on)
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 			ret = clk_prepare_enable(dev->clock);
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@@ -95,12 +114,23 @@
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 	return ret;
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 }
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116
 
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+static inline void hix5hd2_ir_enable(struct hix5hd2_ir_priv *priv)
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+{
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+	u32 val = IR_ENABLE_EN;
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+
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+	if (priv->socdata->flags & HIX5HD2_FLAG_EXTRA_ENABLE)
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+		val |= IR_ENABLE_EN_EXTRA;
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+
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+	writel_relaxed(val, priv->base + IR_ENABLE);
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+}
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+
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 static int hix5hd2_ir_config(struct hix5hd2_ir_priv *priv)
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 {
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 	int timeout = 10000;
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 	u32 val, rate;
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-	writel_relaxed(0x01, priv->base + IR_ENABLE);
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+	hix5hd2_ir_enable(priv);
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+
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 	while (readl_relaxed(priv->base + IR_BUSY)) {
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 		if (timeout--) {
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 			udelay(1);
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@@ -131,13 +161,13 @@
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 	struct hix5hd2_ir_priv *priv = rdev->priv;
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 	int ret;
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163
 
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-	ret = hix5hd2_ir_enable(priv, true);
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+	ret = hix5hd2_ir_clk_enable(priv, true);
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 	if (ret)
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 		return ret;
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 	ret = hix5hd2_ir_config(priv);
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 	if (ret) {
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-		hix5hd2_ir_enable(priv, false);
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+		hix5hd2_ir_clk_enable(priv, false);
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 		return ret;
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 	}
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 	return 0;
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@@ -147,7 +177,7 @@
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 {
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 	struct hix5hd2_ir_priv *priv = rdev->priv;
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179
 
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-	hix5hd2_ir_enable(priv, false);
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+	hix5hd2_ir_clk_enable(priv, false);
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 }
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182
 
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 static irqreturn_t hix5hd2_ir_rx_interrupt(int irq, void *data)
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@@ -175,7 +205,7 @@
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 	}
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206
 
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 	if ((irq_sr & INTMS_SYMBRCV) || (irq_sr & INTMS_TIMEOUT)) {
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-		DEFINE_IR_RAW_EVENT(ev);
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+		struct ir_raw_event ev = {};
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209
 
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 		symb_num = readl_relaxed(priv->base + IR_DATAH);
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 		for (i = 0; i < symb_num; i++) {
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@@ -184,12 +214,12 @@
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 			data_h =  ((symb_val >> 16) & 0xffff) * 10;
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 			symb_time = (data_l + data_h) / 10;
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216
 
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-			ev.duration = US_TO_NS(data_l);
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+			ev.duration = data_l;
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 			ev.pulse = true;
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 			ir_raw_event_store(priv->rdev, &ev);
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220
 
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 			if (symb_time < IR_CFG_SYMBOL_MAXWIDTH) {
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-				ev.duration = US_TO_NS(data_h);
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+				ev.duration = data_h;
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 				ev.pulse = false;
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 				ir_raw_event_store(priv->rdev, &ev);
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 			} else {
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@@ -208,6 +238,13 @@
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 	return IRQ_HANDLED;
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 }
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240
 
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+static const struct of_device_id hix5hd2_ir_table[] = {
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+	{ .compatible = "hisilicon,hix5hd2-ir", &hix5hd2_data, },
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+	{ .compatible = "hisilicon,hi3796cv300-ir", &hi3796cv300_data, },
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+	{},
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+};
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+MODULE_DEVICE_TABLE(of, hix5hd2_ir_table);
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+
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 static int hix5hd2_ir_probe(struct platform_device *pdev)
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 {
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 	struct rc_dev *rdev;
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@@ -215,12 +252,20 @@
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 	struct resource *res;
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 	struct hix5hd2_ir_priv *priv;
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 	struct device_node *node = pdev->dev.of_node;
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+	const struct of_device_id *of_id;
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 	const char *map_name;
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 	int ret;
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258
 
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 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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 	if (!priv)
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 		return -ENOMEM;
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+
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+	of_id = of_match_device(hix5hd2_ir_table, dev);
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+	if (!of_id) {
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+		dev_err(dev, "Unable to initialize IR data\n");
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+		return -ENODEV;
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+	}
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+	priv->socdata = of_id->data;
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269
 
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 	priv->regmap = syscon_regmap_lookup_by_phandle(node,
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 						       "hisilicon,power-syscon");
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@@ -235,10 +280,8 @@
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 		return PTR_ERR(priv->base);
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281
 
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 	priv->irq = platform_get_irq(pdev, 0);
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-	if (priv->irq < 0) {
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-		dev_err(dev, "irq can not get\n");
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+	if (priv->irq < 0)
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 		return priv->irq;
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-	}
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285
 
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 	rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
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 	if (!rdev)
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@@ -268,8 +311,8 @@
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 	rdev->input_id.vendor = 0x0001;
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 	rdev->input_id.product = 0x0001;
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 	rdev->input_id.version = 0x0100;
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-	rdev->rx_resolution = US_TO_NS(10);
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-	rdev->timeout = US_TO_NS(IR_CFG_SYMBOL_MAXWIDTH * 10);
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+	rdev->rx_resolution = 10;
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+	rdev->timeout = IR_CFG_SYMBOL_MAXWIDTH * 10;
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316
 
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 	ret = rc_register_device(rdev);
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 	if (ret < 0)
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@@ -314,7 +357,7 @@
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 	struct hix5hd2_ir_priv *priv = dev_get_drvdata(dev);
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358
 
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 	clk_disable_unprepare(priv->clock);
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-	hix5hd2_ir_enable(priv, false);
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+	hix5hd2_ir_clk_enable(priv, false);
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361
 
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 	return 0;
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 }
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@@ -324,17 +367,18 @@
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 	struct hix5hd2_ir_priv *priv = dev_get_drvdata(dev);
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 	int ret;
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369
 
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-	ret = hix5hd2_ir_enable(priv, true);
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+	ret = hix5hd2_ir_clk_enable(priv, true);
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 	if (ret)
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 		return ret;
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373
 
331
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 	ret = clk_prepare_enable(priv->clock);
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 	if (ret) {
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-		hix5hd2_ir_enable(priv, false);
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+		hix5hd2_ir_clk_enable(priv, false);
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 		return ret;
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 	}
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379
 
337
-	writel_relaxed(0x01, priv->base + IR_ENABLE);
380
+	hix5hd2_ir_enable(priv);
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+
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 	writel_relaxed(0x00, priv->base + IR_INTM);
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 	writel_relaxed(0xff, priv->base + IR_INTC);
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 	writel_relaxed(0x01, priv->base + IR_START);
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..
@@ -345,12 +389,6 @@
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389
 
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 static SIMPLE_DEV_PM_OPS(hix5hd2_ir_pm_ops, hix5hd2_ir_suspend,
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391
 			 hix5hd2_ir_resume);
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-
349
-static const struct of_device_id hix5hd2_ir_table[] = {
350
-	{ .compatible = "hisilicon,hix5hd2-ir", },
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-	{},
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-};
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-MODULE_DEVICE_TABLE(of, hix5hd2_ir_table);
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392
 
355
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 static struct platform_driver hix5hd2_ir_driver = {
356
394
 	.driver = {