add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/media/platform/vsp1/vsp1_brx.c
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@@ -153,7 +153,7 @@
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 	format = vsp1_entity_get_pad_format(&brx->entity, config, fmt->pad);
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 	*format = fmt->format;
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-	/* Reset the compose rectangle */
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+	/* Reset the compose rectangle. */
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 	if (fmt->pad != brx->entity.source_pad) {
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 		struct v4l2_rect *compose;
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@@ -164,7 +164,7 @@
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 		compose->height = format->height;
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 	}
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-	/* Propagate the format code to all pads */
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+	/* Propagate the format code to all pads. */
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 	if (fmt->pad == BRX_PAD_SINK(0)) {
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 		unsigned int i;
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@@ -283,6 +283,7 @@
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 static void brx_configure_stream(struct vsp1_entity *entity,
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 				 struct vsp1_pipeline *pipe,
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+				 struct vsp1_dl_list *dl,
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 				 struct vsp1_dl_body *dlb)
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 {
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 	struct vsp1_brx *brx = to_brx(&entity->subdev);
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@@ -296,7 +297,7 @@
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 	/*
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 	 * The hardware is extremely flexible but we have no userspace API to
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 	 * expose all the parameters, nor is it clear whether we would have use
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-	 * cases for all the supported modes. Let's just harcode the parameters
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+	 * cases for all the supported modes. Let's just hardcode the parameters
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 	 * to sane default values for now.
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 	 */
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@@ -373,7 +374,7 @@
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 		vsp1_brx_write(brx, dlb, VI6_BRU_CTRL(i), ctrl);
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 		/*
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-		 * Harcode the blending formula to
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+		 * Hardcode the blending formula to
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 		 *
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 		 *	DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
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 		 *	DSTa = DSTa * (1 - SRCa) + SRCa