.. | .. |
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15 | 15 | |
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16 | 16 | #define CIF_ISP_REQ_BUFS_MIN 0 |
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17 | 17 | |
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18 | | -static int mi_frame_end(struct rkisp_stream *stream); |
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| 18 | +static int mi_frame_end(struct rkisp_stream *stream, u32 state); |
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19 | 19 | static void rkisp_buf_queue(struct vb2_buffer *vb); |
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20 | 20 | |
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| 21 | +static const struct capture_fmt mp_fmts[] = { |
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| 22 | + /* yuv422 */ |
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| 23 | + { |
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| 24 | + .fourcc = V4L2_PIX_FMT_UYVY, |
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| 25 | + .fmt_type = FMT_YUV, |
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| 26 | + .bpp = { 16 }, |
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| 27 | + .cplanes = 1, |
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| 28 | + .mplanes = 1, |
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| 29 | + .uv_swap = 0, |
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| 30 | + .write_format = MI_CTRL_MP_WRITE_YUVINT, |
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| 31 | + .output_format = ISP32_MI_OUTPUT_YUV422, |
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| 32 | + }, { |
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| 33 | + .fourcc = V4L2_PIX_FMT_YUV422P, |
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| 34 | + .fmt_type = FMT_YUV, |
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| 35 | + .bpp = { 8, 4, 4 }, |
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| 36 | + .cplanes = 3, |
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| 37 | + .mplanes = 1, |
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| 38 | + .uv_swap = 0, |
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| 39 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 40 | + .output_format = ISP32_MI_OUTPUT_YUV422, |
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| 41 | + }, { |
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| 42 | + .fourcc = V4L2_PIX_FMT_NV16, |
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| 43 | + .fmt_type = FMT_YUV, |
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| 44 | + .bpp = { 8, 16 }, |
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| 45 | + .cplanes = 2, |
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| 46 | + .mplanes = 1, |
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| 47 | + .uv_swap = 0, |
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| 48 | + .write_format = MI_CTRL_MP_WRITE_YUV_SPLA, |
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| 49 | + .output_format = ISP32_MI_OUTPUT_YUV422, |
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| 50 | + }, { |
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| 51 | + .fourcc = V4L2_PIX_FMT_NV61, |
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| 52 | + .fmt_type = FMT_YUV, |
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| 53 | + .bpp = { 8, 16 }, |
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| 54 | + .cplanes = 2, |
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| 55 | + .mplanes = 1, |
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| 56 | + .uv_swap = 1, |
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| 57 | + .write_format = MI_CTRL_MP_WRITE_YUV_SPLA, |
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| 58 | + .output_format = ISP32_MI_OUTPUT_YUV422, |
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| 59 | + }, { |
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| 60 | + .fourcc = V4L2_PIX_FMT_YUV422M, |
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| 61 | + .fmt_type = FMT_YUV, |
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| 62 | + .bpp = { 8, 8, 8 }, |
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| 63 | + .cplanes = 3, |
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| 64 | + .mplanes = 3, |
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| 65 | + .uv_swap = 0, |
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| 66 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 67 | + .output_format = ISP32_MI_OUTPUT_YUV422, |
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| 68 | + }, |
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| 69 | + /* yuv420 */ |
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| 70 | + { |
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| 71 | + .fourcc = V4L2_PIX_FMT_NV21, |
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| 72 | + .fmt_type = FMT_YUV, |
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| 73 | + .bpp = { 8, 16 }, |
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| 74 | + .cplanes = 2, |
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| 75 | + .mplanes = 1, |
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| 76 | + .uv_swap = 1, |
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| 77 | + .write_format = MI_CTRL_MP_WRITE_YUV_SPLA, |
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| 78 | + .output_format = ISP32_MI_OUTPUT_YUV420, |
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| 79 | + }, { |
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| 80 | + .fourcc = V4L2_PIX_FMT_NV12, |
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| 81 | + .fmt_type = FMT_YUV, |
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| 82 | + .bpp = { 8, 16 }, |
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| 83 | + .cplanes = 2, |
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| 84 | + .mplanes = 1, |
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| 85 | + .uv_swap = 0, |
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| 86 | + .write_format = MI_CTRL_MP_WRITE_YUV_SPLA, |
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| 87 | + .output_format = ISP32_MI_OUTPUT_YUV420, |
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| 88 | + }, { |
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| 89 | + .fourcc = V4L2_PIX_FMT_NV21M, |
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| 90 | + .fmt_type = FMT_YUV, |
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| 91 | + .bpp = { 8, 16 }, |
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| 92 | + .cplanes = 2, |
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| 93 | + .mplanes = 2, |
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| 94 | + .uv_swap = 1, |
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| 95 | + .write_format = MI_CTRL_MP_WRITE_YUV_SPLA, |
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| 96 | + .output_format = ISP32_MI_OUTPUT_YUV420, |
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| 97 | + }, { |
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| 98 | + .fourcc = V4L2_PIX_FMT_NV12M, |
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| 99 | + .fmt_type = FMT_YUV, |
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| 100 | + .bpp = { 8, 16 }, |
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| 101 | + .cplanes = 2, |
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| 102 | + .mplanes = 2, |
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| 103 | + .uv_swap = 0, |
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| 104 | + .write_format = MI_CTRL_MP_WRITE_YUV_SPLA, |
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| 105 | + .output_format = ISP32_MI_OUTPUT_YUV420, |
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| 106 | + }, { |
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| 107 | + .fourcc = V4L2_PIX_FMT_YUV420, |
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| 108 | + .fmt_type = FMT_YUV, |
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| 109 | + .bpp = { 8, 8, 8 }, |
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| 110 | + .cplanes = 3, |
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| 111 | + .mplanes = 1, |
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| 112 | + .uv_swap = 0, |
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| 113 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 114 | + .output_format = ISP32_MI_OUTPUT_YUV420, |
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| 115 | + }, |
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| 116 | + /* yuv444 */ |
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| 117 | + { |
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| 118 | + .fourcc = V4L2_PIX_FMT_YUV444M, |
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| 119 | + .fmt_type = FMT_YUV, |
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| 120 | + .bpp = { 8, 8, 8 }, |
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| 121 | + .cplanes = 3, |
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| 122 | + .mplanes = 3, |
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| 123 | + .uv_swap = 0, |
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| 124 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 125 | + .output_format = 0, |
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| 126 | + }, |
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| 127 | + /* raw */ |
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| 128 | + { |
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| 129 | + .fourcc = V4L2_PIX_FMT_SRGGB8, |
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| 130 | + .fmt_type = FMT_BAYER, |
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| 131 | + .bpp = { 8 }, |
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| 132 | + .mplanes = 1, |
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| 133 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 134 | + .output_format = 0, |
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| 135 | + }, { |
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| 136 | + .fourcc = V4L2_PIX_FMT_SGRBG8, |
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| 137 | + .fmt_type = FMT_BAYER, |
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| 138 | + .bpp = { 8 }, |
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| 139 | + .mplanes = 1, |
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| 140 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 141 | + .output_format = 0, |
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| 142 | + }, { |
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| 143 | + .fourcc = V4L2_PIX_FMT_SGBRG8, |
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| 144 | + .fmt_type = FMT_BAYER, |
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| 145 | + .bpp = { 8 }, |
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| 146 | + .mplanes = 1, |
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| 147 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 148 | + .output_format = 0, |
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| 149 | + }, { |
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| 150 | + .fourcc = V4L2_PIX_FMT_SBGGR8, |
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| 151 | + .fmt_type = FMT_BAYER, |
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| 152 | + .bpp = { 8 }, |
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| 153 | + .mplanes = 1, |
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| 154 | + .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, |
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| 155 | + .output_format = 0, |
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| 156 | + }, { |
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| 157 | + .fourcc = V4L2_PIX_FMT_SRGGB10, |
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| 158 | + .fmt_type = FMT_BAYER, |
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| 159 | + .bpp = { 10 }, |
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| 160 | + .mplanes = 1, |
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| 161 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 162 | + .output_format = 0, |
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| 163 | + }, { |
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| 164 | + .fourcc = V4L2_PIX_FMT_SGRBG10, |
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| 165 | + .fmt_type = FMT_BAYER, |
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| 166 | + .bpp = { 10 }, |
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| 167 | + .mplanes = 1, |
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| 168 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 169 | + .output_format = 0, |
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| 170 | + }, { |
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| 171 | + .fourcc = V4L2_PIX_FMT_SGBRG10, |
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| 172 | + .fmt_type = FMT_BAYER, |
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| 173 | + .bpp = { 10 }, |
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| 174 | + .mplanes = 1, |
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| 175 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 176 | + .output_format = 0, |
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| 177 | + }, { |
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| 178 | + .fourcc = V4L2_PIX_FMT_SBGGR10, |
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| 179 | + .fmt_type = FMT_BAYER, |
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| 180 | + .bpp = { 10 }, |
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| 181 | + .mplanes = 1, |
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| 182 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 183 | + .output_format = 0, |
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| 184 | + }, { |
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| 185 | + .fourcc = V4L2_PIX_FMT_SRGGB12, |
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| 186 | + .fmt_type = FMT_BAYER, |
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| 187 | + .bpp = { 12 }, |
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| 188 | + .mplanes = 1, |
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| 189 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 190 | + .output_format = 0, |
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| 191 | + }, { |
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| 192 | + .fourcc = V4L2_PIX_FMT_SGRBG12, |
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| 193 | + .fmt_type = FMT_BAYER, |
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| 194 | + .bpp = { 12 }, |
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| 195 | + .mplanes = 1, |
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| 196 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 197 | + .output_format = 0, |
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| 198 | + }, { |
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| 199 | + .fourcc = V4L2_PIX_FMT_SGBRG12, |
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| 200 | + .fmt_type = FMT_BAYER, |
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| 201 | + .bpp = { 12 }, |
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| 202 | + .mplanes = 1, |
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| 203 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 204 | + .output_format = 0, |
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| 205 | + }, { |
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| 206 | + .fourcc = V4L2_PIX_FMT_SBGGR12, |
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| 207 | + .fmt_type = FMT_BAYER, |
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| 208 | + .bpp = { 12 }, |
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| 209 | + .mplanes = 1, |
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| 210 | + .write_format = MI_CTRL_MP_WRITE_RAW12, |
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| 211 | + .output_format = 0, |
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| 212 | + }, |
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| 213 | +}; |
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| 214 | + |
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| 215 | +static const struct capture_fmt sp_fmts[] = { |
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| 216 | + /* yuv422 */ |
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| 217 | + { |
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| 218 | + .fourcc = V4L2_PIX_FMT_UYVY, |
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| 219 | + .fmt_type = FMT_YUV, |
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| 220 | + .bpp = { 16 }, |
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| 221 | + .cplanes = 1, |
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| 222 | + .mplanes = 1, |
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| 223 | + .uv_swap = 0, |
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| 224 | + .write_format = MI_CTRL_SP_WRITE_INT, |
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| 225 | + .output_format = MI_CTRL_SP_OUTPUT_YUV422, |
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| 226 | + }, { |
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| 227 | + .fourcc = V4L2_PIX_FMT_YUV422P, |
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| 228 | + .fmt_type = FMT_YUV, |
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| 229 | + .bpp = { 8, 8, 8 }, |
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| 230 | + .cplanes = 3, |
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| 231 | + .mplanes = 1, |
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| 232 | + .uv_swap = 0, |
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| 233 | + .write_format = MI_CTRL_SP_WRITE_PLA, |
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| 234 | + .output_format = MI_CTRL_SP_OUTPUT_YUV422, |
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| 235 | + }, { |
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| 236 | + .fourcc = V4L2_PIX_FMT_NV16, |
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| 237 | + .fmt_type = FMT_YUV, |
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| 238 | + .bpp = { 8, 16 }, |
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| 239 | + .cplanes = 2, |
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| 240 | + .mplanes = 1, |
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| 241 | + .uv_swap = 0, |
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| 242 | + .write_format = MI_CTRL_SP_WRITE_SPLA, |
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| 243 | + .output_format = MI_CTRL_SP_OUTPUT_YUV422, |
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| 244 | + }, { |
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| 245 | + .fourcc = V4L2_PIX_FMT_NV61, |
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| 246 | + .fmt_type = FMT_YUV, |
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| 247 | + .bpp = { 8, 16 }, |
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| 248 | + .cplanes = 2, |
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| 249 | + .mplanes = 1, |
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| 250 | + .uv_swap = 1, |
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| 251 | + .write_format = MI_CTRL_SP_WRITE_SPLA, |
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| 252 | + .output_format = MI_CTRL_SP_OUTPUT_YUV422, |
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| 253 | + }, { |
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| 254 | + .fourcc = V4L2_PIX_FMT_YUV422M, |
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| 255 | + .fmt_type = FMT_YUV, |
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| 256 | + .bpp = { 8, 8, 8 }, |
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| 257 | + .cplanes = 3, |
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| 258 | + .mplanes = 3, |
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| 259 | + .uv_swap = 0, |
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| 260 | + .write_format = MI_CTRL_SP_WRITE_PLA, |
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| 261 | + .output_format = MI_CTRL_SP_OUTPUT_YUV422, |
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| 262 | + }, |
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| 263 | + /* yuv420 */ |
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| 264 | + { |
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| 265 | + .fourcc = V4L2_PIX_FMT_NV21, |
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| 266 | + .fmt_type = FMT_YUV, |
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| 267 | + .bpp = { 8, 16 }, |
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| 268 | + .cplanes = 2, |
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| 269 | + .mplanes = 1, |
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| 270 | + .uv_swap = 1, |
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| 271 | + .write_format = MI_CTRL_SP_WRITE_SPLA, |
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| 272 | + .output_format = MI_CTRL_SP_OUTPUT_YUV420, |
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| 273 | + }, { |
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| 274 | + .fourcc = V4L2_PIX_FMT_NV12, |
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| 275 | + .fmt_type = FMT_YUV, |
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| 276 | + .bpp = { 8, 16 }, |
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| 277 | + .cplanes = 2, |
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| 278 | + .mplanes = 1, |
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| 279 | + .uv_swap = 0, |
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| 280 | + .write_format = MI_CTRL_SP_WRITE_SPLA, |
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| 281 | + .output_format = MI_CTRL_SP_OUTPUT_YUV420, |
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| 282 | + }, { |
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| 283 | + .fourcc = V4L2_PIX_FMT_NV21M, |
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| 284 | + .fmt_type = FMT_YUV, |
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| 285 | + .bpp = { 8, 16 }, |
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| 286 | + .cplanes = 2, |
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| 287 | + .mplanes = 2, |
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| 288 | + .uv_swap = 1, |
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| 289 | + .write_format = MI_CTRL_SP_WRITE_SPLA, |
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| 290 | + .output_format = MI_CTRL_SP_OUTPUT_YUV420, |
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| 291 | + }, { |
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| 292 | + .fourcc = V4L2_PIX_FMT_NV12M, |
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| 293 | + .fmt_type = FMT_YUV, |
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| 294 | + .bpp = { 8, 16 }, |
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| 295 | + .cplanes = 2, |
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| 296 | + .mplanes = 2, |
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| 297 | + .uv_swap = 0, |
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| 298 | + .write_format = MI_CTRL_SP_WRITE_SPLA, |
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| 299 | + .output_format = MI_CTRL_SP_OUTPUT_YUV420, |
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| 300 | + }, { |
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| 301 | + .fourcc = V4L2_PIX_FMT_YUV420, |
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| 302 | + .fmt_type = FMT_YUV, |
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| 303 | + .bpp = { 8, 8, 8 }, |
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| 304 | + .cplanes = 3, |
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| 305 | + .mplanes = 1, |
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| 306 | + .uv_swap = 0, |
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| 307 | + .write_format = MI_CTRL_SP_WRITE_PLA, |
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| 308 | + .output_format = MI_CTRL_SP_OUTPUT_YUV420, |
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| 309 | + }, |
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| 310 | + /* yuv444 */ |
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| 311 | + { |
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| 312 | + .fourcc = V4L2_PIX_FMT_YUV444M, |
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| 313 | + .fmt_type = FMT_YUV, |
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| 314 | + .bpp = { 8, 8, 8 }, |
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| 315 | + .cplanes = 3, |
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| 316 | + .mplanes = 3, |
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| 317 | + .uv_swap = 0, |
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| 318 | + .write_format = MI_CTRL_SP_WRITE_PLA, |
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| 319 | + .output_format = MI_CTRL_SP_OUTPUT_YUV444, |
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| 320 | + }, |
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| 321 | + /* yuv400 */ |
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| 322 | + { |
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| 323 | + .fourcc = V4L2_PIX_FMT_GREY, |
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| 324 | + .fmt_type = FMT_YUV, |
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| 325 | + .bpp = { 8 }, |
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| 326 | + .cplanes = 1, |
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| 327 | + .mplanes = 1, |
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| 328 | + .uv_swap = 0, |
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| 329 | + .write_format = MI_CTRL_SP_WRITE_PLA, |
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| 330 | + .output_format = MI_CTRL_SP_OUTPUT_YUV400, |
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| 331 | + }, |
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| 332 | + /* rgb */ |
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| 333 | + { |
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| 334 | + .fourcc = V4L2_PIX_FMT_XBGR32, |
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| 335 | + .fmt_type = FMT_RGB, |
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| 336 | + .bpp = { 32 }, |
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| 337 | + .mplanes = 1, |
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| 338 | + .write_format = MI_CTRL_SP_WRITE_PLA, |
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| 339 | + .output_format = MI_CTRL_SP_OUTPUT_RGB888, |
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| 340 | + }, { |
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| 341 | + .fourcc = V4L2_PIX_FMT_RGB565, |
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| 342 | + .fmt_type = FMT_RGB, |
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| 343 | + .bpp = { 16 }, |
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| 344 | + .mplanes = 1, |
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| 345 | + .write_format = MI_CTRL_SP_WRITE_PLA, |
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| 346 | + .output_format = MI_CTRL_SP_OUTPUT_RGB565, |
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| 347 | + }, |
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| 348 | +}; |
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21 | 349 | static const struct capture_fmt dmatx_fmts[] = { |
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22 | 350 | /* raw */ |
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23 | 351 | { |
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.. | .. |
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392 | 720 | stream->out_isp_fmt.write_format, false); |
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393 | 721 | mi_frame_end_int_enable(stream); |
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394 | 722 | /* set up first buffer */ |
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395 | | - mi_frame_end(stream); |
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| 723 | + mi_frame_end(stream, FRAME_INIT); |
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396 | 724 | return 0; |
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397 | 725 | } |
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398 | 726 | |
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.. | .. |
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466 | 794 | CIF_MI_SP_AUTOUPDATE_ENABLE, false); |
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467 | 795 | mi_frame_end_int_enable(stream); |
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468 | 796 | /* set up first buffer */ |
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469 | | - mi_frame_end(stream); |
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| 797 | + mi_frame_end(stream, FRAME_INIT); |
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470 | 798 | return 0; |
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471 | 799 | } |
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472 | 800 | |
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.. | .. |
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483 | 811 | |
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484 | 812 | if (!dev->active_sensor || |
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485 | 813 | (dev->active_sensor && |
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486 | | - dev->active_sensor->mbus.type != V4L2_MBUS_CSI2)) { |
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| 814 | + dev->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY)) { |
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487 | 815 | v4l2_err(&dev->v4l2_dev, |
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488 | 816 | "only mipi sensor support rawwr3\n"); |
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489 | 817 | return -EINVAL; |
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.. | .. |
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495 | 823 | stream->out_fmt.height); |
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496 | 824 | raw_wr_set_pic_offs(stream, 0); |
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497 | 825 | mi_set_y_size(stream, in_size); |
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498 | | - mi_frame_end(stream); |
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| 826 | + mi_frame_end(stream, FRAME_INIT); |
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499 | 827 | mi_frame_end_int_enable(stream); |
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500 | 828 | mi_wr_ctrl2(base, SW_RAW3_WR_AUTOUPD); |
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501 | 829 | mi_raw_length(stream); |
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.. | .. |
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526 | 854 | |
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527 | 855 | if (!dev->active_sensor || |
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528 | 856 | (dev->active_sensor && |
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529 | | - dev->active_sensor->mbus.type != V4L2_MBUS_CSI2)) { |
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| 857 | + dev->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY)) { |
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530 | 858 | v4l2_err(&dev->v4l2_dev, |
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531 | 859 | "only mipi sensor support rawwr2 path\n"); |
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532 | 860 | return -EINVAL; |
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.. | .. |
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541 | 869 | stream->out_fmt.height); |
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542 | 870 | raw_wr_set_pic_offs(stream, 0); |
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543 | 871 | mi_set_y_size(stream, in_size); |
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544 | | - mi_frame_end(stream); |
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| 872 | + mi_frame_end(stream, FRAME_INIT); |
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545 | 873 | mi_frame_end_int_enable(stream); |
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546 | 874 | mi_wr_ctrl2(base, SW_RAW1_WR_AUTOUPD); |
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547 | 875 | mi_raw_length(stream); |
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.. | .. |
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571 | 899 | |
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572 | 900 | if (!dev->active_sensor || |
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573 | 901 | (dev->active_sensor && |
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574 | | - dev->active_sensor->mbus.type != V4L2_MBUS_CSI2)) { |
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| 902 | + dev->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY)) { |
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575 | 903 | if (stream->id == RKISP_STREAM_DMATX0) |
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576 | 904 | v4l2_err(&dev->v4l2_dev, |
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577 | 905 | "only mipi sensor support rawwr0 path\n"); |
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.. | .. |
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587 | 915 | stream->out_fmt.height); |
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588 | 916 | raw_wr_set_pic_offs(stream, 0); |
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589 | 917 | mi_set_y_size(stream, in_size); |
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590 | | - mi_frame_end(stream); |
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| 918 | + mi_frame_end(stream, FRAME_INIT); |
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591 | 919 | mi_frame_end_int_enable(stream); |
---|
592 | 920 | mi_wr_ctrl2(base, SW_RAW0_WR_AUTOUPD); |
---|
593 | 921 | mi_raw_length(stream); |
---|
.. | .. |
---|
618 | 946 | |
---|
619 | 947 | static void sp_enable_mi(struct rkisp_stream *stream) |
---|
620 | 948 | { |
---|
621 | | - rkisp_set_bits(stream->ispdev, CIF_MI_CTRL, 0, |
---|
622 | | - CIF_MI_CTRL_SP_ENABLE, false); |
---|
| 949 | + struct rkisp_device *dev = stream->ispdev; |
---|
| 950 | + struct capture_fmt *fmt = &stream->out_isp_fmt; |
---|
| 951 | + u32 val = CIF_MI_CTRL_SP_ENABLE; |
---|
| 952 | + u32 mask = CIF_MI_SP_Y_FULL_YUV2RGB | CIF_MI_SP_CBCR_FULL_YUV2RGB; |
---|
| 953 | + |
---|
| 954 | + if (fmt->fmt_type == FMT_RGB && |
---|
| 955 | + dev->isp_sdev.quantization == V4L2_QUANTIZATION_FULL_RANGE) |
---|
| 956 | + val |= mask; |
---|
| 957 | + rkisp_set_bits(stream->ispdev, CIF_MI_CTRL, mask, val, false); |
---|
623 | 958 | } |
---|
624 | 959 | |
---|
625 | 960 | static void dmatx_enable_mi(struct rkisp_stream *stream) |
---|
.. | .. |
---|
739 | 1074 | .enable_mi = mp_enable_mi, |
---|
740 | 1075 | .disable_mi = mp_disable_mi, |
---|
741 | 1076 | .stop_mi = mp_stop_mi, |
---|
742 | | - .set_data_path = mp_set_data_path, |
---|
| 1077 | + .set_data_path = stream_data_path, |
---|
743 | 1078 | .is_stream_stopped = mp_is_stream_stopped, |
---|
744 | 1079 | .update_mi = update_mi, |
---|
745 | 1080 | .frame_end = mi_frame_end, |
---|
.. | .. |
---|
750 | 1085 | .enable_mi = sp_enable_mi, |
---|
751 | 1086 | .disable_mi = sp_disable_mi, |
---|
752 | 1087 | .stop_mi = sp_stop_mi, |
---|
753 | | - .set_data_path = sp_set_data_path, |
---|
| 1088 | + .set_data_path = stream_data_path, |
---|
754 | 1089 | .is_stream_stopped = sp_is_stream_stopped, |
---|
755 | 1090 | .update_mi = update_mi, |
---|
756 | 1091 | .frame_end = mi_frame_end, |
---|
.. | .. |
---|
797 | 1132 | return; |
---|
798 | 1133 | |
---|
799 | 1134 | if (isp_dev->hdr.op_mode == HDR_RDBK_FRAME1) { |
---|
800 | | - vb2_buffer_done(&cap->rdbk_buf[RDBK_S]->vb.vb2_buf, VB2_BUF_STATE_DONE); |
---|
| 1135 | + rkisp_stream_buf_done(stream, cap->rdbk_buf[RDBK_S]); |
---|
801 | 1136 | cap->rdbk_buf[RDBK_S] = NULL; |
---|
802 | 1137 | return; |
---|
803 | 1138 | } |
---|
.. | .. |
---|
834 | 1169 | goto RDBK_FRM_UNMATCH; |
---|
835 | 1170 | } |
---|
836 | 1171 | |
---|
837 | | - cap->rdbk_buf[RDBK_S]->vb.sequence = |
---|
838 | | - cap->rdbk_buf[RDBK_L]->vb.sequence; |
---|
839 | | - vb2_buffer_done(&cap->rdbk_buf[RDBK_L]->vb.vb2_buf, |
---|
840 | | - VB2_BUF_STATE_DONE); |
---|
841 | | - vb2_buffer_done(&cap->rdbk_buf[RDBK_S]->vb.vb2_buf, |
---|
842 | | - VB2_BUF_STATE_DONE); |
---|
| 1172 | + cap->rdbk_buf[RDBK_S]->vb.sequence = cap->rdbk_buf[RDBK_L]->vb.sequence; |
---|
| 1173 | + rkisp_stream_buf_done(&cap->stream[RKISP_STREAM_DMATX0], cap->rdbk_buf[RDBK_L]); |
---|
| 1174 | + rkisp_stream_buf_done(stream, cap->rdbk_buf[RDBK_S]); |
---|
843 | 1175 | } else { |
---|
844 | 1176 | v4l2_err(&isp_dev->v4l2_dev, "lost long frames\n"); |
---|
845 | 1177 | goto RDBK_FRM_UNMATCH; |
---|
.. | .. |
---|
865 | 1197 | * is processing and we should set up buffer for next-next frame, |
---|
866 | 1198 | * otherwise it will overflow. |
---|
867 | 1199 | */ |
---|
868 | | -static int mi_frame_end(struct rkisp_stream *stream) |
---|
| 1200 | +static int mi_frame_end(struct rkisp_stream *stream, u32 state) |
---|
869 | 1201 | { |
---|
870 | 1202 | struct rkisp_device *dev = stream->ispdev; |
---|
871 | 1203 | struct rkisp_capture_device *cap = &dev->cap_dev; |
---|
.. | .. |
---|
936 | 1268 | rdbk_frame_end(stream); |
---|
937 | 1269 | } |
---|
938 | 1270 | } else { |
---|
939 | | - vb2_buffer_done(vb2_buf, VB2_BUF_STATE_DONE); |
---|
| 1271 | + rkisp_stream_buf_done(stream, stream->curr_buf); |
---|
940 | 1272 | } |
---|
941 | 1273 | |
---|
942 | 1274 | stream->curr_buf = NULL; |
---|
.. | .. |
---|
993 | 1325 | { |
---|
994 | 1326 | struct rkisp_device *dev = stream->ispdev; |
---|
995 | 1327 | struct v4l2_device *v4l2_dev = &dev->v4l2_dev; |
---|
| 1328 | + unsigned long lock_flags = 0; |
---|
996 | 1329 | int ret = 0; |
---|
| 1330 | + bool is_wait = dev->hw_dev->is_shutdown ? false : true; |
---|
997 | 1331 | |
---|
998 | 1332 | if (!dev->dmarx_dev.trigger && |
---|
999 | 1333 | (is_rdbk_stream(stream) || is_hdr_stream(stream))) { |
---|
.. | .. |
---|
1006 | 1340 | stream->id != RKISP_STREAM_SP) || dev->hw_dev->is_single) |
---|
1007 | 1341 | stream->ops->stop_mi(stream); |
---|
1008 | 1342 | |
---|
1009 | | - if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP) |
---|
| 1343 | + if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP) { |
---|
1010 | 1344 | hdr_stop_dmatx(dev); |
---|
1011 | | - |
---|
1012 | | - if (dev->isp_state & ISP_START && |
---|
1013 | | - !stream->ops->is_stream_stopped(dev->base_addr)) { |
---|
| 1345 | + if (IS_HDR_RDBK(dev->rd_mode) && !dev->hw_dev->is_single) { |
---|
| 1346 | + spin_lock_irqsave(&dev->hw_dev->rdbk_lock, lock_flags); |
---|
| 1347 | + if (dev->hw_dev->cur_dev_id != dev->dev_id || dev->hw_dev->is_idle) { |
---|
| 1348 | + is_wait = false; |
---|
| 1349 | + stream->ops->disable_mi(stream); |
---|
| 1350 | + } |
---|
| 1351 | + if (atomic_read(&dev->cap_dev.refcnt) == 1 && !is_wait) |
---|
| 1352 | + dev->isp_state = ISP_STOP; |
---|
| 1353 | + spin_unlock_irqrestore(&dev->hw_dev->rdbk_lock, lock_flags); |
---|
| 1354 | + } |
---|
| 1355 | + } |
---|
| 1356 | + if (is_wait && !stream->ops->is_stream_stopped(stream)) { |
---|
1014 | 1357 | ret = wait_event_timeout(stream->done, |
---|
1015 | 1358 | !stream->streaming, |
---|
1016 | 1359 | msecs_to_jiffies(500)); |
---|
.. | .. |
---|
1044 | 1387 | */ |
---|
1045 | 1388 | static int rkisp_start(struct rkisp_stream *stream) |
---|
1046 | 1389 | { |
---|
1047 | | - void __iomem *base = stream->ispdev->base_addr; |
---|
1048 | 1390 | struct rkisp_device *dev = stream->ispdev; |
---|
1049 | | - bool is_update = false; |
---|
1050 | 1391 | int ret; |
---|
1051 | 1392 | |
---|
1052 | | - if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP) { |
---|
1053 | | - is_update = (stream->id == RKISP_STREAM_MP) ? |
---|
1054 | | - !dev->cap_dev.stream[RKISP_STREAM_SP].streaming : |
---|
1055 | | - !dev->cap_dev.stream[RKISP_STREAM_MP].streaming; |
---|
1056 | | - } |
---|
1057 | | - |
---|
1058 | 1393 | if (stream->ops->set_data_path) |
---|
1059 | | - stream->ops->set_data_path(base); |
---|
| 1394 | + stream->ops->set_data_path(stream); |
---|
1060 | 1395 | ret = stream->ops->config_mi(stream); |
---|
1061 | 1396 | if (ret) |
---|
1062 | 1397 | return ret; |
---|
.. | .. |
---|
1064 | 1399 | stream->ops->enable_mi(stream); |
---|
1065 | 1400 | if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP) |
---|
1066 | 1401 | hdr_config_dmatx(dev); |
---|
1067 | | - if (is_update) |
---|
1068 | | - dev->irq_ends_mask |= |
---|
1069 | | - (stream->id == RKISP_STREAM_MP) ? ISP_FRAME_MP : ISP_FRAME_SP; |
---|
1070 | 1402 | stream->streaming = true; |
---|
1071 | 1403 | |
---|
1072 | 1404 | return 0; |
---|
.. | .. |
---|
1214 | 1546 | list_del(&buf->queue); |
---|
1215 | 1547 | vb2_buffer_done(&buf->vb.vb2_buf, state); |
---|
1216 | 1548 | } |
---|
| 1549 | + while (!list_empty(&stream->buf_done_list)) { |
---|
| 1550 | + buf = list_first_entry(&stream->buf_done_list, |
---|
| 1551 | + struct rkisp_buffer, queue); |
---|
| 1552 | + list_del(&buf->queue); |
---|
| 1553 | + vb2_buffer_done(&buf->vb.vb2_buf, state); |
---|
| 1554 | + } |
---|
1217 | 1555 | spin_unlock_irqrestore(&stream->vbq_lock, lock_flags); |
---|
1218 | 1556 | } |
---|
1219 | 1557 | |
---|
.. | .. |
---|
1252 | 1590 | v4l2_err(v4l2_dev, "pipeline close failed error:%d\n", ret); |
---|
1253 | 1591 | rkisp_destroy_dummy_buf(stream); |
---|
1254 | 1592 | atomic_dec(&dev->cap_dev.refcnt); |
---|
1255 | | - |
---|
| 1593 | + tasklet_disable(&stream->buf_done_tasklet); |
---|
1256 | 1594 | end: |
---|
1257 | 1595 | mutex_unlock(&dev->hw_dev->dev_lock); |
---|
1258 | 1596 | } |
---|
.. | .. |
---|
1378 | 1716 | goto pipe_stream_off; |
---|
1379 | 1717 | } |
---|
1380 | 1718 | } |
---|
1381 | | - |
---|
| 1719 | + tasklet_enable(&stream->buf_done_tasklet); |
---|
1382 | 1720 | mutex_unlock(&dev->hw_dev->dev_lock); |
---|
1383 | 1721 | return 0; |
---|
1384 | 1722 | |
---|
.. | .. |
---|
1445 | 1783 | INIT_LIST_HEAD(&stream->buf_queue); |
---|
1446 | 1784 | init_waitqueue_head(&stream->done); |
---|
1447 | 1785 | spin_lock_init(&stream->vbq_lock); |
---|
1448 | | - stream->linked = MEDIA_LNK_FL_ENABLED; |
---|
| 1786 | + stream->linked = true; |
---|
1449 | 1787 | |
---|
1450 | 1788 | switch (id) { |
---|
1451 | 1789 | case RKISP_STREAM_SP: |
---|
.. | .. |
---|
1453 | 1791 | sizeof(vdev->name)); |
---|
1454 | 1792 | stream->ops = &rkisp_sp_streams_ops; |
---|
1455 | 1793 | stream->config = &rkisp_sp_stream_config; |
---|
| 1794 | + stream->config->fmts = sp_fmts; |
---|
| 1795 | + stream->config->fmt_size = ARRAY_SIZE(sp_fmts); |
---|
1456 | 1796 | break; |
---|
1457 | 1797 | case RKISP_STREAM_DMATX0: |
---|
1458 | 1798 | strlcpy(vdev->name, DMATX0_VDEV_NAME, |
---|
.. | .. |
---|
1477 | 1817 | sizeof(vdev->name)); |
---|
1478 | 1818 | stream->ops = &rkisp_mp_streams_ops; |
---|
1479 | 1819 | stream->config = &rkisp_mp_stream_config; |
---|
| 1820 | + stream->config->fmts = mp_fmts; |
---|
| 1821 | + stream->config->fmt_size = ARRAY_SIZE(mp_fmts); |
---|
1480 | 1822 | } |
---|
1481 | 1823 | |
---|
1482 | 1824 | node = vdev_to_node(vdev); |
---|
.. | .. |
---|
1588 | 1930 | stream->streaming = false; |
---|
1589 | 1931 | stream->ops->disable_mi(stream); |
---|
1590 | 1932 | wake_up(&stream->done); |
---|
1591 | | - } else if (stream->ops->is_stream_stopped(dev->base_addr)) { |
---|
| 1933 | + } else if (stream->ops->is_stream_stopped(stream)) { |
---|
1592 | 1934 | stream->stopping = false; |
---|
1593 | 1935 | stream->streaming = false; |
---|
1594 | 1936 | wake_up(&stream->done); |
---|
.. | .. |
---|
1598 | 1940 | end_tx2 = false; |
---|
1599 | 1941 | } |
---|
1600 | 1942 | } else { |
---|
1601 | | - mi_frame_end(stream); |
---|
| 1943 | + mi_frame_end(stream, FRAME_IRQ); |
---|
1602 | 1944 | if (dev->dmarx_dev.trigger == T_AUTO && |
---|
1603 | 1945 | ((dev->hdr.op_mode == HDR_RDBK_FRAME1 && end_tx2) || |
---|
1604 | 1946 | (dev->hdr.op_mode == HDR_RDBK_FRAME2 && end_tx2 && end_tx0))) { |
---|
.. | .. |
---|
1613 | 1955 | stream = &dev->cap_dev.stream[RKISP_STREAM_MP]; |
---|
1614 | 1956 | if (!stream->streaming) |
---|
1615 | 1957 | dev->irq_ends_mask &= ~ISP_FRAME_MP; |
---|
1616 | | - else |
---|
1617 | | - dev->irq_ends_mask |= ISP_FRAME_MP; |
---|
1618 | 1958 | rkisp_check_idle(dev, ISP_FRAME_MP); |
---|
1619 | 1959 | } |
---|
1620 | 1960 | if (mis_val & CIF_MI_SP_FRAME) { |
---|
1621 | 1961 | stream = &dev->cap_dev.stream[RKISP_STREAM_SP]; |
---|
1622 | 1962 | if (!stream->streaming) |
---|
1623 | 1963 | dev->irq_ends_mask &= ~ISP_FRAME_SP; |
---|
1624 | | - else |
---|
1625 | | - dev->irq_ends_mask |= ISP_FRAME_SP; |
---|
1626 | 1964 | rkisp_check_idle(dev, ISP_FRAME_SP); |
---|
1627 | 1965 | } |
---|
1628 | 1966 | } |
---|