hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/media/platform/exynos4-is/mipi-csis.c
....@@ -1,12 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Samsung S5P/EXYNOS SoC series MIPI-CSI receiver driver
34 *
45 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
56 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
107 */
118
129 #include <linux/clk.h>
....@@ -44,7 +41,7 @@
4441 /* CSIS global control */
4542 #define S5PCSIS_CTRL 0x00
4643 #define S5PCSIS_CTRL_DPDN_DEFAULT (0 << 31)
47
-#define S5PCSIS_CTRL_DPDN_SWAP (1 << 31)
44
+#define S5PCSIS_CTRL_DPDN_SWAP (1UL << 31)
4845 #define S5PCSIS_CTRL_ALIGN_32BIT (1 << 20)
4946 #define S5PCSIS_CTRL_UPDATE_SHADOW (1 << 16)
5047 #define S5PCSIS_CTRL_WCLK_EXTCLK (1 << 8)
....@@ -68,7 +65,7 @@
6865
6966 /* Interrupt mask */
7067 #define S5PCSIS_INTMSK 0x10
71
-#define S5PCSIS_INTMSK_EVEN_BEFORE (1 << 31)
68
+#define S5PCSIS_INTMSK_EVEN_BEFORE (1UL << 31)
7269 #define S5PCSIS_INTMSK_EVEN_AFTER (1 << 30)
7370 #define S5PCSIS_INTMSK_ODD_BEFORE (1 << 29)
7471 #define S5PCSIS_INTMSK_ODD_AFTER (1 << 28)
....@@ -86,7 +83,7 @@
8683
8784 /* Interrupt source */
8885 #define S5PCSIS_INTSRC 0x14
89
-#define S5PCSIS_INTSRC_EVEN_BEFORE (1 << 31)
86
+#define S5PCSIS_INTSRC_EVEN_BEFORE (1UL << 31)
9087 #define S5PCSIS_INTSRC_EVEN_AFTER (1 << 30)
9188 #define S5PCSIS_INTSRC_EVEN (0x3 << 30)
9289 #define S5PCSIS_INTSRC_ODD_BEFORE (1 << 29)
....@@ -183,7 +180,7 @@
183180 * @index: the hardware instance index
184181 * @pdev: CSIS platform device
185182 * @phy: pointer to the CSIS generic PHY
186
- * @regs: mmaped I/O registers memory
183
+ * @regs: mmapped I/O registers memory
187184 * @supplies: CSIS regulator supplies
188185 * @clock: CSIS clocks
189186 * @irq: requested s5p-mipi-csis irq number
....@@ -497,7 +494,7 @@
497494 struct device *dev = &state->pdev->dev;
498495
499496 if (on)
500
- return pm_runtime_get_sync(dev);
497
+ return pm_runtime_resume_and_get(dev);
501498
502499 return pm_runtime_put_sync(dev);
503500 }
....@@ -512,11 +509,9 @@
512509
513510 if (enable) {
514511 s5pcsis_clear_counters(state);
515
- ret = pm_runtime_get_sync(&state->pdev->dev);
516
- if (ret && ret != 1) {
517
- pm_runtime_put_noidle(&state->pdev->dev);
512
+ ret = pm_runtime_resume_and_get(&state->pdev->dev);
513
+ if (ret < 0)
518514 return ret;
519
- }
520515 }
521516
522517 mutex_lock(&state->lock);
....@@ -538,7 +533,7 @@
538533 if (!enable)
539534 pm_runtime_put(&state->pdev->dev);
540535
541
- return ret == 1 ? 0 : ret;
536
+ return ret;
542537 }
543538
544539 static int s5pcsis_enum_mbus_code(struct v4l2_subdev *sd,
....@@ -720,7 +715,7 @@
720715 struct csis_state *state)
721716 {
722717 struct device_node *node = pdev->dev.of_node;
723
- struct v4l2_fwnode_endpoint endpoint;
718
+ struct v4l2_fwnode_endpoint endpoint = { .bus_type = 0 };
724719 int ret;
725720
726721 if (of_property_read_u32(node, "clock-frequency",
....@@ -747,7 +742,7 @@
747742 goto err;
748743 }
749744
750
- /* Get MIPI CSI-2 bus configration from the endpoint node. */
745
+ /* Get MIPI CSI-2 bus configuration from the endpoint node. */
751746 of_property_read_u32(node, "samsung,csis-hs-settle",
752747 &state->hs_settle);
753748 state->wclk_ext = of_property_read_bool(node,
....@@ -808,10 +803,8 @@
808803 return PTR_ERR(state->regs);
809804
810805 state->irq = platform_get_irq(pdev, 0);
811
- if (state->irq < 0) {
812
- dev_err(dev, "Failed to get irq\n");
806
+ if (state->irq < 0)
813807 return state->irq;
814
- }
815808
816809 for (i = 0; i < CSIS_NUM_SUPPLIES; i++)
817810 state->supplies[i].supply = csis_supply_name[i];