.. | .. |
---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
---|
1 | 2 | /* |
---|
2 | 3 | * drxd_firm.c : DRXD firmware tables |
---|
3 | 4 | * |
---|
4 | 5 | * Copyright (C) 2006-2007 Micronas |
---|
5 | | - * |
---|
6 | | - * This program is free software; you can redistribute it and/or |
---|
7 | | - * modify it under the terms of the GNU General Public License |
---|
8 | | - * version 2 only, as published by the Free Software Foundation. |
---|
9 | | - * |
---|
10 | | - * |
---|
11 | | - * This program is distributed in the hope that it will be useful, |
---|
12 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
---|
13 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
---|
14 | | - * GNU General Public License for more details. |
---|
15 | | - * |
---|
16 | | - * To obtain the license, point your browser to |
---|
17 | | - * http://www.gnu.org/copyleft/gpl.html |
---|
18 | 6 | */ |
---|
19 | 7 | |
---|
20 | 8 | /* TODO: generate this file with a script from a settings file */ |
---|
.. | .. |
---|
890 | 878 | /* End demod, combining RF in and diversity in, MPEG TS out */ |
---|
891 | 879 | WR16(B_FE_CF_REG_IMP_VAL__A, 0x0), /* disable impulse noise cruncher */ |
---|
892 | 880 | WR16(B_FE_AD_REG_INVEXT__A, 0x0), /* clock inversion (for sohard board) */ |
---|
893 | | - WR16(B_CP_REG_BR_STR_DEL__A, 10), /* apperently no mb delay matching is best */ |
---|
| 881 | + WR16(B_CP_REG_BR_STR_DEL__A, 10), /* apparently no mb delay matching is best */ |
---|
894 | 882 | |
---|
895 | 883 | WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_DIV_ON | /* org = 0x81 combining enabled */ |
---|
896 | 884 | B_EQ_REG_RC_SEL_CAR_MEAS_A_CC | |
---|