hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/irqchip/Kconfig
....@@ -1,3 +1,4 @@
1
+# SPDX-License-Identifier: GPL-2.0-only
12 menu "IRQ chip support"
23
34 config IRQCHIP
....@@ -6,7 +7,6 @@
67
78 config ARM_GIC
89 bool
9
- select IRQ_DOMAIN
1010 select IRQ_DOMAIN_HIERARCHY
1111 select GENERIC_IRQ_MULTI_HANDLER
1212 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
....@@ -15,10 +15,10 @@
1515 bool
1616 depends on PM
1717 select ARM_GIC
18
- select PM_CLK
1918
2019 config ARM_GIC_MAX_NR
2120 int
21
+ depends on ARM_GIC
2222 default 2 if ARCH_REALVIEW
2323 default 1
2424
....@@ -33,7 +33,6 @@
3333
3434 config ARM_GIC_V3
3535 bool
36
- select IRQ_DOMAIN
3736 select GENERIC_IRQ_MULTI_HANDLER
3837 select IRQ_DOMAIN_HIERARCHY
3938 select PARTITION_PERCPU
....@@ -59,7 +58,6 @@
5958
6059 config ARM_NVIC
6160 bool
62
- select IRQ_DOMAIN
6361 select IRQ_DOMAIN_HIERARCHY
6462 select GENERIC_IRQ_CHIP
6563
....@@ -88,6 +86,14 @@
8886 depends on PCI
8987 select PCI_MSI
9088 select GENERIC_IRQ_CHIP
89
+
90
+config AL_FIC
91
+ bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
92
+ depends on OF || COMPILE_TEST
93
+ select GENERIC_IRQ_CHIP
94
+ select IRQ_DOMAIN
95
+ help
96
+ Support Amazon's Annapurna Labs Fabric Interrupt Controller.
9197
9298 config ATMEL_AIC_IRQ
9399 bool
....@@ -129,10 +135,20 @@
129135 select GENERIC_IRQ_CHIP
130136 select IRQ_DOMAIN
131137
132
-config DW_APB_ICTL
138
+config DAVINCI_AINTC
133139 bool
134140 select GENERIC_IRQ_CHIP
135141 select IRQ_DOMAIN
142
+
143
+config DAVINCI_CP_INTC
144
+ bool
145
+ select GENERIC_IRQ_CHIP
146
+ select IRQ_DOMAIN
147
+
148
+config DW_APB_ICTL
149
+ bool
150
+ select GENERIC_IRQ_CHIP
151
+ select IRQ_DOMAIN_HIERARCHY
136152
137153 config FARADAY_FTINTC010
138154 bool
....@@ -150,12 +166,20 @@
150166 select GENERIC_IRQ_CHIP
151167 select IRQ_DOMAIN
152168
169
+config IXP4XX_IRQ
170
+ bool
171
+ select IRQ_DOMAIN
172
+ select GENERIC_IRQ_MULTI_HANDLER
173
+ select SPARSE_IRQ
174
+
175
+config MADERA_IRQ
176
+ tristate
177
+
153178 config IRQ_MIPS_CPU
154179 bool
155180 select GENERIC_IRQ_CHIP
156
- select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
181
+ select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING
157182 select IRQ_DOMAIN
158
- select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
159183 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
160184
161185 config CLPS711X_IRQCHIP
....@@ -195,14 +219,39 @@
195219 help
196220 Support for the J-Core integrated AIC.
197221
198
-config RENESAS_INTC_IRQPIN
222
+config RDA_INTC
199223 bool
200224 select IRQ_DOMAIN
201225
226
+config RENESAS_INTC_IRQPIN
227
+ bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
228
+ select IRQ_DOMAIN
229
+ help
230
+ Enable support for the Renesas Interrupt Controller for external
231
+ interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
232
+
202233 config RENESAS_IRQC
203
- bool
234
+ bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
204235 select GENERIC_IRQ_CHIP
205236 select IRQ_DOMAIN
237
+ help
238
+ Enable support for the Renesas Interrupt Controller for external
239
+ devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
240
+
241
+config RENESAS_RZA1_IRQC
242
+ bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
243
+ select IRQ_DOMAIN_HIERARCHY
244
+ help
245
+ Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
246
+ to 8 external interrupts with configurable sense select.
247
+
248
+config SL28CPLD_INTC
249
+ bool "Kontron sl28cpld IRQ controller"
250
+ depends on MFD_SL28CPLD=y || COMPILE_TEST
251
+ select REGMAP_IRQ
252
+ help
253
+ Interrupt controller driver for the board management controller
254
+ found on the Kontron sl28 CPLD.
206255
207256 config ST_IRQCHIP
208257 bool
....@@ -264,7 +313,7 @@
264313
265314 config MIPS_GIC
266315 bool
267
- select GENERIC_IRQ_IPI
316
+ select GENERIC_IRQ_IPI if SMP
268317 select IRQ_DOMAIN_HIERARCHY
269318 select MIPS_CM
270319
....@@ -273,13 +322,28 @@
273322 depends on MACH_INGENIC
274323 default y
275324
325
+config INGENIC_TCU_IRQ
326
+ bool "Ingenic JZ47xx TCU interrupt controller"
327
+ default MACH_INGENIC
328
+ depends on MIPS || COMPILE_TEST
329
+ select MFD_SYSCON
330
+ select GENERIC_IRQ_CHIP
331
+ help
332
+ Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
333
+ JZ47xx SoCs.
334
+
335
+ If unsure, say N.
336
+
276337 config RENESAS_H8300H_INTC
277338 bool
278339 select IRQ_DOMAIN
279340
280341 config RENESAS_H8S_INTC
281
- bool
342
+ bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST
282343 select IRQ_DOMAIN
344
+ help
345
+ Enable support for the Renesas H8/300 Interrupt Controller, as found
346
+ on Renesas H8S SoCs.
283347
284348 config IMX_GPCV2
285349 bool
....@@ -310,6 +374,13 @@
310374 config MVEBU_PIC
311375 bool
312376
377
+config MVEBU_SEI
378
+ bool
379
+
380
+config LS_EXTIRQ
381
+ def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
382
+ select MFD_SYSCON
383
+
313384 config LS_SCFG_MSI
314385 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
315386 depends on PCI && PCI_MSI
....@@ -332,7 +403,6 @@
332403 config QCOM_IRQ_COMBINER
333404 bool "QCOM IRQ combiner support"
334405 depends on ARCH_QCOM && ACPI
335
- select IRQ_DOMAIN
336406 select IRQ_DOMAIN_HIERARCHY
337407 help
338408 Say yes here to add support for the IRQ combiner devices embedded
....@@ -347,9 +417,9 @@
347417 Support for the UniPhier AIDET (ARM Interrupt Detector).
348418
349419 config MESON_IRQ_GPIO
350
- bool "Meson GPIO Interrupt Multiplexer"
351
- depends on ARCH_MESON
352
- select IRQ_DOMAIN
420
+ tristate "Meson GPIO Interrupt Multiplexer"
421
+ depends on ARCH_MESON || COMPILE_TEST
422
+ default ARCH_MESON
353423 select IRQ_DOMAIN_HIERARCHY
354424 help
355425 Support Meson SoC Family GPIO Interrupt Multiplexer
....@@ -364,17 +434,103 @@
364434 for Goldfish based virtual platforms.
365435
366436 config QCOM_PDC
367
- bool "QCOM PDC"
437
+ tristate "QCOM PDC"
368438 depends on ARCH_QCOM
369
- select IRQ_DOMAIN
439
+ depends on QCOM_SCM || !QCOM_SCM
370440 select IRQ_DOMAIN_HIERARCHY
371441 help
372442 Power Domain Controller driver to manage and configure wakeup
373443 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
374444
445
+config CSKY_MPINTC
446
+ bool "C-SKY Multi Processor Interrupt Controller"
447
+ depends on CSKY
448
+ help
449
+ Say yes here to enable C-SKY SMP interrupt controller driver used
450
+ for C-SKY SMP system.
451
+ In fact it's not mmio map in hardware and it uses ld/st to visit the
452
+ controller's register inside CPU.
453
+
454
+config CSKY_APB_INTC
455
+ bool "C-SKY APB Interrupt Controller"
456
+ depends on CSKY
457
+ help
458
+ Say yes here to enable C-SKY APB interrupt controller driver used
459
+ by C-SKY single core SOC system. It uses mmio map apb-bus to visit
460
+ the controller's register.
461
+
462
+config IMX_IRQSTEER
463
+ bool "i.MX IRQSTEER support"
464
+ depends on ARCH_MXC || COMPILE_TEST
465
+ default ARCH_MXC
466
+ select IRQ_DOMAIN
467
+ help
468
+ Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
469
+
470
+config IMX_INTMUX
471
+ bool "i.MX INTMUX support" if COMPILE_TEST
472
+ default y if ARCH_MXC
473
+ select IRQ_DOMAIN
474
+ help
475
+ Support for the i.MX INTMUX interrupt multiplexer.
476
+
477
+config LS1X_IRQ
478
+ bool "Loongson-1 Interrupt Controller"
479
+ depends on MACH_LOONGSON32
480
+ default y
481
+ select IRQ_DOMAIN
482
+ select GENERIC_IRQ_CHIP
483
+ help
484
+ Support for the Loongson-1 platform Interrupt Controller.
485
+
486
+config TI_SCI_INTR_IRQCHIP
487
+ bool
488
+ depends on TI_SCI_PROTOCOL
489
+ select IRQ_DOMAIN_HIERARCHY
490
+ help
491
+ This enables the irqchip driver support for K3 Interrupt router
492
+ over TI System Control Interface available on some new TI's SoCs.
493
+ If you wish to use interrupt router irq resources managed by the
494
+ TI System Controller, say Y here. Otherwise, say N.
495
+
496
+config TI_SCI_INTA_IRQCHIP
497
+ bool
498
+ depends on TI_SCI_PROTOCOL
499
+ select IRQ_DOMAIN_HIERARCHY
500
+ select TI_SCI_INTA_MSI_DOMAIN
501
+ help
502
+ This enables the irqchip driver support for K3 Interrupt aggregator
503
+ over TI System Control Interface available on some new TI's SoCs.
504
+ If you wish to use interrupt aggregator irq resources managed by the
505
+ TI System Controller, say Y here. Otherwise, say N.
506
+
507
+config TI_PRUSS_INTC
508
+ tristate "TI PRU-ICSS Interrupt Controller"
509
+ depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3
510
+ select IRQ_DOMAIN
511
+ help
512
+ This enables support for the PRU-ICSS Local Interrupt Controller
513
+ present within a PRU-ICSS subsystem present on various TI SoCs.
514
+ The PRUSS INTC enables various interrupts to be routed to multiple
515
+ different processors within the SoC.
516
+
517
+config RISCV_INTC
518
+ bool "RISC-V Local Interrupt Controller"
519
+ depends on RISCV
520
+ default y
521
+ help
522
+ This enables support for the per-HART local interrupt controller
523
+ found in standard RISC-V systems. The per-HART local interrupt
524
+ controller handles timer interrupts, software interrupts, and
525
+ hardware interrupts. Without a per-HART local interrupt controller,
526
+ a RISC-V system will be unable to handle any interrupts.
527
+
528
+ If you don't know what to do here, say Y.
529
+
375530 config SIFIVE_PLIC
376531 bool "SiFive Platform-Level Interrupt Controller"
377532 depends on RISCV
533
+ select IRQ_DOMAIN_HIERARCHY
378534 help
379535 This enables support for the PLIC chip found in SiFive (and
380536 potentially other) RISC-V systems. The PLIC controls devices
....@@ -384,4 +540,65 @@
384540
385541 If you don't know what to do here, say Y.
386542
543
+config EXYNOS_IRQ_COMBINER
544
+ bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
545
+ depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
546
+ help
547
+ Say yes here to add support for the IRQ combiner devices embedded
548
+ in Samsung Exynos chips.
549
+
550
+config LOONGSON_LIOINTC
551
+ bool "Loongson Local I/O Interrupt Controller"
552
+ depends on MACH_LOONGSON64
553
+ default y
554
+ select IRQ_DOMAIN
555
+ select GENERIC_IRQ_CHIP
556
+ help
557
+ Support for the Loongson Local I/O Interrupt Controller.
558
+
559
+config LOONGSON_HTPIC
560
+ bool "Loongson3 HyperTransport PIC Controller"
561
+ depends on MACH_LOONGSON64
562
+ default y
563
+ select IRQ_DOMAIN
564
+ select GENERIC_IRQ_CHIP
565
+ help
566
+ Support for the Loongson-3 HyperTransport PIC Controller.
567
+
568
+config LOONGSON_HTVEC
569
+ bool "Loongson3 HyperTransport Interrupt Vector Controller"
570
+ depends on MACH_LOONGSON64
571
+ default MACH_LOONGSON64
572
+ select IRQ_DOMAIN_HIERARCHY
573
+ help
574
+ Support for the Loongson3 HyperTransport Interrupt Vector Controller.
575
+
576
+config LOONGSON_PCH_PIC
577
+ bool "Loongson PCH PIC Controller"
578
+ depends on MACH_LOONGSON64 || COMPILE_TEST
579
+ default MACH_LOONGSON64
580
+ select IRQ_DOMAIN_HIERARCHY
581
+ select IRQ_FASTEOI_HIERARCHY_HANDLERS
582
+ help
583
+ Support for the Loongson PCH PIC Controller.
584
+
585
+config LOONGSON_PCH_MSI
586
+ bool "Loongson PCH MSI Controller"
587
+ depends on MACH_LOONGSON64 || COMPILE_TEST
588
+ depends on PCI
589
+ default MACH_LOONGSON64
590
+ select IRQ_DOMAIN_HIERARCHY
591
+ select PCI_MSI
592
+ help
593
+ Support for the Loongson PCH MSI Controller.
594
+
595
+config MST_IRQ
596
+ bool "MStar Interrupt Controller"
597
+ depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST
598
+ default ARCH_MEDIATEK
599
+ select IRQ_DOMAIN
600
+ select IRQ_DOMAIN_HIERARCHY
601
+ help
602
+ Support MStar Interrupt Controller.
603
+
387604 endmenu