hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/infiniband/hw/bnxt_re/roce_hsi.h
....@@ -49,11 +49,11 @@
4949 #define CMPL_DOORBELL_IDX_SFT 0
5050 #define CMPL_DOORBELL_RESERVED_MASK 0x3000000UL
5151 #define CMPL_DOORBELL_RESERVED_SFT 24
52
- #define CMPL_DOORBELL_IDX_VALID 0x4000000UL
52
+ #define CMPL_DOORBELL_IDX_VALID 0x4000000UL
5353 #define CMPL_DOORBELL_MASK 0x8000000UL
5454 #define CMPL_DOORBELL_KEY_MASK 0xf0000000UL
5555 #define CMPL_DOORBELL_KEY_SFT 28
56
- #define CMPL_DOORBELL_KEY_CMPL (0x2UL << 28)
56
+ #define CMPL_DOORBELL_KEY_CMPL (0x2UL << 28)
5757 };
5858
5959 /* Status Door Bell Format (4 bytes) */
....@@ -71,46 +71,56 @@
7171 /* RoCE Host Structures */
7272
7373 /* Doorbell Structures */
74
-/* 64b Doorbell Format (8 bytes) */
75
-struct dbr_dbr {
76
- __le32 index;
77
- #define DBR_DBR_INDEX_MASK 0xfffffUL
78
- #define DBR_DBR_INDEX_SFT 0
79
- #define DBR_DBR_RESERVED12_MASK 0xfff00000UL
80
- #define DBR_DBR_RESERVED12_SFT 20
81
- __le32 type_xid;
82
- #define DBR_DBR_XID_MASK 0xfffffUL
83
- #define DBR_DBR_XID_SFT 0
84
- #define DBR_DBR_RESERVED8_MASK 0xff00000UL
85
- #define DBR_DBR_RESERVED8_SFT 20
86
- #define DBR_DBR_TYPE_MASK 0xf0000000UL
87
- #define DBR_DBR_TYPE_SFT 28
88
- #define DBR_DBR_TYPE_SQ (0x0UL << 28)
89
- #define DBR_DBR_TYPE_RQ (0x1UL << 28)
90
- #define DBR_DBR_TYPE_SRQ (0x2UL << 28)
91
- #define DBR_DBR_TYPE_SRQ_ARM (0x3UL << 28)
92
- #define DBR_DBR_TYPE_CQ (0x4UL << 28)
93
- #define DBR_DBR_TYPE_CQ_ARMSE (0x5UL << 28)
94
- #define DBR_DBR_TYPE_CQ_ARMALL (0x6UL << 28)
95
- #define DBR_DBR_TYPE_CQ_ARMENA (0x7UL << 28)
96
- #define DBR_DBR_TYPE_SRQ_ARMENA (0x8UL << 28)
97
- #define DBR_DBR_TYPE_CQ_CUTOFF_ACK (0x9UL << 28)
98
- #define DBR_DBR_TYPE_NULL (0xfUL << 28)
74
+/* dbc_dbc (size:64b/8B) */
75
+struct dbc_dbc {
76
+ __le32 index;
77
+ #define DBC_DBC_INDEX_MASK 0xffffffUL
78
+ #define DBC_DBC_INDEX_SFT 0
79
+ __le32 type_path_xid;
80
+ #define DBC_DBC_XID_MASK 0xfffffUL
81
+ #define DBC_DBC_XID_SFT 0
82
+ #define DBC_DBC_PATH_MASK 0x3000000UL
83
+ #define DBC_DBC_PATH_SFT 24
84
+ #define DBC_DBC_PATH_ROCE (0x0UL << 24)
85
+ #define DBC_DBC_PATH_L2 (0x1UL << 24)
86
+ #define DBC_DBC_PATH_ENGINE (0x2UL << 24)
87
+ #define DBC_DBC_PATH_LAST DBC_DBC_PATH_ENGINE
88
+ #define DBC_DBC_DEBUG_TRACE 0x8000000UL
89
+ #define DBC_DBC_TYPE_MASK 0xf0000000UL
90
+ #define DBC_DBC_TYPE_SFT 28
91
+ #define DBC_DBC_TYPE_SQ (0x0UL << 28)
92
+ #define DBC_DBC_TYPE_RQ (0x1UL << 28)
93
+ #define DBC_DBC_TYPE_SRQ (0x2UL << 28)
94
+ #define DBC_DBC_TYPE_SRQ_ARM (0x3UL << 28)
95
+ #define DBC_DBC_TYPE_CQ (0x4UL << 28)
96
+ #define DBC_DBC_TYPE_CQ_ARMSE (0x5UL << 28)
97
+ #define DBC_DBC_TYPE_CQ_ARMALL (0x6UL << 28)
98
+ #define DBC_DBC_TYPE_CQ_ARMENA (0x7UL << 28)
99
+ #define DBC_DBC_TYPE_SRQ_ARMENA (0x8UL << 28)
100
+ #define DBC_DBC_TYPE_CQ_CUTOFF_ACK (0x9UL << 28)
101
+ #define DBC_DBC_TYPE_NQ (0xaUL << 28)
102
+ #define DBC_DBC_TYPE_NQ_ARM (0xbUL << 28)
103
+ #define DBC_DBC_TYPE_NULL (0xfUL << 28)
104
+ #define DBC_DBC_TYPE_LAST DBC_DBC_TYPE_NULL
99105 };
100106
101
-/* 32b Doorbell Format (4 bytes) */
102
-struct dbr_dbr32 {
103
- __le32 type_abs_incr_xid;
104
- #define DBR_DBR32_XID_MASK 0xfffffUL
105
- #define DBR_DBR32_XID_SFT 0
106
- #define DBR_DBR32_RESERVED4_MASK 0xf00000UL
107
- #define DBR_DBR32_RESERVED4_SFT 20
108
- #define DBR_DBR32_INCR_MASK 0xf000000UL
109
- #define DBR_DBR32_INCR_SFT 24
110
- #define DBR_DBR32_ABS 0x10000000UL
111
- #define DBR_DBR32_TYPE_MASK 0xe0000000UL
112
- #define DBR_DBR32_TYPE_SFT 29
113
- #define DBR_DBR32_TYPE_SQ (0x0UL << 29)
107
+/* dbc_dbc32 (size:32b/4B) */
108
+struct dbc_dbc32 {
109
+ __le32 type_abs_incr_xid;
110
+ #define DBC_DBC32_XID_MASK 0xfffffUL
111
+ #define DBC_DBC32_XID_SFT 0
112
+ #define DBC_DBC32_PATH_MASK 0xc00000UL
113
+ #define DBC_DBC32_PATH_SFT 22
114
+ #define DBC_DBC32_PATH_ROCE (0x0UL << 22)
115
+ #define DBC_DBC32_PATH_L2 (0x1UL << 22)
116
+ #define DBC_DBC32_PATH_LAST DBC_DBC32_PATH_L2
117
+ #define DBC_DBC32_INCR_MASK 0xf000000UL
118
+ #define DBC_DBC32_INCR_SFT 24
119
+ #define DBC_DBC32_ABS 0x10000000UL
120
+ #define DBC_DBC32_TYPE_MASK 0xe0000000UL
121
+ #define DBC_DBC32_TYPE_SFT 29
122
+ #define DBC_DBC32_TYPE_SQ (0x0UL << 29)
123
+ #define DBC_DBC32_TYPE_LAST DBC_DBC32_TYPE_SQ
114124 };
115125
116126 /* SQ WQE Structures */
....@@ -149,7 +159,24 @@
149159 #define SQ_PSN_SEARCH_NEXT_PSN_MASK 0xffffffUL
150160 #define SQ_PSN_SEARCH_NEXT_PSN_SFT 0
151161 #define SQ_PSN_SEARCH_FLAGS_MASK 0xff000000UL
152
- #define SQ_PSN_SEARCH_FLAGS_SFT 24
162
+ #define SQ_PSN_SEARCH_FLAGS_SFT 24
163
+};
164
+
165
+/* sq_psn_search_ext (size:128b/16B) */
166
+struct sq_psn_search_ext {
167
+ __le32 opcode_start_psn;
168
+ #define SQ_PSN_SEARCH_EXT_START_PSN_MASK 0xffffffUL
169
+ #define SQ_PSN_SEARCH_EXT_START_PSN_SFT 0
170
+ #define SQ_PSN_SEARCH_EXT_OPCODE_MASK 0xff000000UL
171
+ #define SQ_PSN_SEARCH_EXT_OPCODE_SFT 24
172
+ __le32 flags_next_psn;
173
+ #define SQ_PSN_SEARCH_EXT_NEXT_PSN_MASK 0xffffffUL
174
+ #define SQ_PSN_SEARCH_EXT_NEXT_PSN_SFT 0
175
+ #define SQ_PSN_SEARCH_EXT_FLAGS_MASK 0xff000000UL
176
+ #define SQ_PSN_SEARCH_EXT_FLAGS_SFT 24
177
+ __le16 start_slot_idx;
178
+ __le16 reserved16;
179
+ __le32 reserved32;
153180 };
154181
155182 /* Send SQ WQE (40 bytes) */
....@@ -181,6 +208,20 @@
181208 #define SQ_SEND_RESERVED_AVID_SFT 20
182209 __le64 reserved64;
183210 __le32 data[24];
211
+};
212
+
213
+/* sq_send_hdr (size:256b/32B) */
214
+struct sq_send_hdr {
215
+ u8 wqe_type;
216
+ u8 flags;
217
+ u8 wqe_size;
218
+ u8 reserved8_1;
219
+ __le32 inv_key_or_imm_data;
220
+ __le32 length;
221
+ __le32 q_key;
222
+ __le32 dst_qp;
223
+ __le32 avid;
224
+ __le64 reserved64;
184225 };
185226
186227 /* Send Raw Ethernet and QP1 SQ WQE (40 bytes) */
....@@ -238,6 +279,21 @@
238279 __le32 data[24];
239280 };
240281
282
+/* sq_send_raweth_qp1_hdr (size:256b/32B) */
283
+struct sq_send_raweth_qp1_hdr {
284
+ u8 wqe_type;
285
+ u8 flags;
286
+ u8 wqe_size;
287
+ u8 reserved8;
288
+ __le16 lflags;
289
+ __le16 cfa_action;
290
+ __le32 length;
291
+ __le32 reserved32_1;
292
+ __le32 cfa_meta;
293
+ __le32 reserved32_2;
294
+ __le64 reserved64;
295
+};
296
+
241297 /* RDMA SQ WQE (40 bytes) */
242298 struct sq_rdma {
243299 u8 wqe_type;
....@@ -261,6 +317,20 @@
261317 __le32 data[24];
262318 };
263319
320
+/* sq_rdma_hdr (size:256b/32B) */
321
+struct sq_rdma_hdr {
322
+ u8 wqe_type;
323
+ u8 flags;
324
+ u8 wqe_size;
325
+ u8 reserved8;
326
+ __le32 imm_data;
327
+ __le32 length;
328
+ __le32 reserved32_1;
329
+ __le64 remote_va;
330
+ __le32 remote_key;
331
+ __le32 reserved32_2;
332
+};
333
+
264334 /* Atomic SQ WQE (40 bytes) */
265335 struct sq_atomic {
266336 u8 wqe_type;
....@@ -280,6 +350,17 @@
280350 __le32 data[24];
281351 };
282352
353
+/* sq_atomic_hdr (size:256b/32B) */
354
+struct sq_atomic_hdr {
355
+ u8 wqe_type;
356
+ u8 flags;
357
+ __le16 reserved16;
358
+ __le32 remote_key;
359
+ __le64 remote_va;
360
+ __le64 swap_data;
361
+ __le64 cmp_data;
362
+};
363
+
283364 /* Local Invalidate SQ WQE (40 bytes) */
284365 struct sq_localinvalidate {
285366 u8 wqe_type;
....@@ -295,6 +376,16 @@
295376 __le64 reserved64;
296377 __le32 reserved128[4];
297378 __le32 data[24];
379
+};
380
+
381
+/* sq_localinvalidate_hdr (size:256b/32B) */
382
+struct sq_localinvalidate_hdr {
383
+ u8 wqe_type;
384
+ u8 flags;
385
+ __le16 reserved16;
386
+ __le32 inv_l_key;
387
+ __le64 reserved64;
388
+ u8 reserved128[16];
298389 };
299390
300391 /* FR-PMR SQ WQE (40 bytes) */
....@@ -353,6 +444,21 @@
353444 __le32 data[24];
354445 };
355446
447
+/* sq_fr_pmr_hdr (size:256b/32B) */
448
+struct sq_fr_pmr_hdr {
449
+ u8 wqe_type;
450
+ u8 flags;
451
+ u8 access_cntl;
452
+ u8 zero_based_page_size_log;
453
+ __le32 l_key;
454
+ u8 length[5];
455
+ u8 reserved8_1;
456
+ u8 reserved8_2;
457
+ u8 numlevels_pbl_page_size_log;
458
+ __le64 pblptr;
459
+ __le64 va;
460
+};
461
+
356462 /* Bind SQ WQE (40 bytes) */
357463 struct sq_bind {
358464 u8 wqe_type;
....@@ -390,6 +496,22 @@
390496 #define SQ_BIND_DATA_SFT 0
391497 };
392498
499
+/* sq_bind_hdr (size:256b/32B) */
500
+struct sq_bind_hdr {
501
+ u8 wqe_type;
502
+ u8 flags;
503
+ u8 access_cntl;
504
+ u8 reserved8_1;
505
+ u8 mw_type_zero_based;
506
+ u8 reserved8_2;
507
+ __le16 reserved16;
508
+ __le32 parent_l_key;
509
+ __le32 l_key;
510
+ __le64 va;
511
+ u8 length[5];
512
+ u8 reserved24[3];
513
+};
514
+
393515 /* RQ/SRQ WQE Structures */
394516 /* RQ/SRQ WQE (40 bytes) */
395517 struct rq_wqe {
....@@ -406,6 +528,17 @@
406528 #define RQ_WQE_RESERVED44_SFT 20
407529 __le32 reserved128[4];
408530 __le32 data[24];
531
+};
532
+
533
+/* rq_wqe_hdr (size:256b/32B) */
534
+struct rq_wqe_hdr {
535
+ u8 wqe_type;
536
+ u8 flags;
537
+ u8 wqe_size;
538
+ u8 reserved8;
539
+ __le32 reserved32;
540
+ __le32 wr_id[2];
541
+ u8 reserved128[16];
409542 };
410543
411544 /* CQ CQE Structures */
....@@ -505,22 +638,24 @@
505638
506639 /* Responder UD CQE (32 bytes) */
507640 struct cq_res_ud {
508
- __le32 length;
641
+ __le16 length;
509642 #define CQ_RES_UD_LENGTH_MASK 0x3fffUL
510643 #define CQ_RES_UD_LENGTH_SFT 0
511
- #define CQ_RES_UD_RESERVED18_MASK 0xffffc000UL
512
- #define CQ_RES_UD_RESERVED18_SFT 14
644
+ __le16 cfa_metadata;
645
+ #define CQ_RES_UD_CFA_METADATA_VID_MASK 0xfffUL
646
+ #define CQ_RES_UD_CFA_METADATA_VID_SFT 0
647
+ #define CQ_RES_UD_CFA_METADATA_DE 0x1000UL
648
+ #define CQ_RES_UD_CFA_METADATA_PRI_MASK 0xe000UL
649
+ #define CQ_RES_UD_CFA_METADATA_PRI_SFT 13
513650 __le32 imm_data;
514651 __le64 qp_handle;
515652 __le16 src_mac[3];
516653 __le16 src_qp_low;
517654 u8 cqe_type_toggle;
518
- #define CQ_RES_UD_TOGGLE 0x1UL
519
- #define CQ_RES_UD_CQE_TYPE_MASK 0x1eUL
520
- #define CQ_RES_UD_CQE_TYPE_SFT 1
655
+ #define CQ_RES_UD_TOGGLE 0x1UL
656
+ #define CQ_RES_UD_CQE_TYPE_MASK 0x1eUL
657
+ #define CQ_RES_UD_CQE_TYPE_SFT 1
521658 #define CQ_RES_UD_CQE_TYPE_RES_UD (0x2UL << 1)
522
- #define CQ_RES_UD_RESERVED3_MASK 0xe0UL
523
- #define CQ_RES_UD_RESERVED3_SFT 5
524659 u8 status;
525660 #define CQ_RES_UD_STATUS_OK 0x0UL
526661 #define CQ_RES_UD_STATUS_LOCAL_ACCESS_ERROR 0x1UL
....@@ -536,18 +671,30 @@
536671 #define CQ_RES_UD_FLAGS_SRQ_SRQ (0x1UL << 0)
537672 #define CQ_RES_UD_FLAGS_SRQ_LAST CQ_RES_UD_FLAGS_SRQ_SRQ
538673 #define CQ_RES_UD_FLAGS_IMM 0x2UL
539
- #define CQ_RES_UD_FLAGS_ROCE_IP_VER_MASK 0xcUL
540
- #define CQ_RES_UD_FLAGS_ROCE_IP_VER_SFT 2
541
- #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V1 (0x0UL << 2)
542
- #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV4 (0x2UL << 2)
543
- #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV6 (0x3UL << 2)
674
+ #define CQ_RES_UD_FLAGS_UNUSED_MASK 0xcUL
675
+ #define CQ_RES_UD_FLAGS_UNUSED_SFT 2
676
+ #define CQ_RES_UD_FLAGS_ROCE_IP_VER_MASK 0x30UL
677
+ #define CQ_RES_UD_FLAGS_ROCE_IP_VER_SFT 4
678
+ #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V1 (0x0UL << 4)
679
+ #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV4 (0x2UL << 4)
680
+ #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV6 (0x3UL << 4)
544681 #define CQ_RES_UD_FLAGS_ROCE_IP_VER_LAST \
545682 CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV6
683
+ #define CQ_RES_UD_FLAGS_META_FORMAT_MASK 0x3c0UL
684
+ #define CQ_RES_UD_FLAGS_META_FORMAT_SFT 6
685
+ #define CQ_RES_UD_FLAGS_META_FORMAT_NONE (0x0UL << 6)
686
+ #define CQ_RES_UD_FLAGS_META_FORMAT_VLAN (0x1UL << 6)
687
+ #define CQ_RES_UD_FLAGS_META_FORMAT_TUNNEL_ID (0x2UL << 6)
688
+ #define CQ_RES_UD_FLAGS_META_FORMAT_CHDR_DATA (0x3UL << 6)
689
+ #define CQ_RES_UD_FLAGS_META_FORMAT_HDR_OFFSET (0x4UL << 6)
690
+ #define CQ_RES_UD_FLAGS_META_FORMAT_LAST \
691
+ CQ_RES_UD_FLAGS_META_FORMAT_HDR_OFFSET
692
+ #define CQ_RES_UD_FLAGS_EXT_META_FORMAT_MASK 0xc00UL
693
+ #define CQ_RES_UD_FLAGS_EXT_META_FORMAT_SFT 10
694
+
546695 __le32 src_qp_high_srq_or_rq_wr_id;
547696 #define CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK 0xfffffUL
548697 #define CQ_RES_UD_SRQ_OR_RQ_WR_ID_SFT 0
549
- #define CQ_RES_UD_RESERVED4_MASK 0xf00000UL
550
- #define CQ_RES_UD_RESERVED4_SFT 20
551698 #define CQ_RES_UD_SRC_QP_HIGH_MASK 0xff000000UL
552699 #define CQ_RES_UD_SRC_QP_HIGH_SFT 24
553700 };
....@@ -979,10 +1126,12 @@
9791126 #define CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION 0x2UL
9801127 #define CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE 0x4UL
9811128 #define CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED 0x8UL
1129
+ #define CMDQ_CREATE_QP_QP_FLAGS_VARIABLE_SIZED_WQE_ENABLED 0x10UL
9821130 u8 type;
9831131 #define CMDQ_CREATE_QP_TYPE_RC 0x2UL
9841132 #define CMDQ_CREATE_QP_TYPE_UD 0x4UL
9851133 #define CMDQ_CREATE_QP_TYPE_RAW_ETHERTYPE 0x6UL
1134
+ #define CMDQ_CREATE_QP_TYPE_GSI 0x7UL
9861135 u8 sq_pg_size_sq_lvl;
9871136 #define CMDQ_CREATE_QP_SQ_LVL_MASK 0xfUL
9881137 #define CMDQ_CREATE_QP_SQ_LVL_SFT 0
....@@ -2719,6 +2868,8 @@
27192868 __le16 max_srq;
27202869 __le32 max_gid;
27212870 __le32 tqm_alloc_reqs[12];
2871
+ __le32 max_dpi;
2872
+ __le32 reserved_32;
27222873 };
27232874
27242875 /* Set resources command response (16 bytes) */
....@@ -2929,6 +3080,11 @@
29293080 __le64 res_srq_load_err;
29303081 __le64 res_tx_pci_err;
29313082 __le64 res_rx_pci_err;
3083
+ __le64 res_oos_drop_count;
3084
+ __le64 active_qp_count_p0;
3085
+ __le64 active_qp_count_p1;
3086
+ __le64 active_qp_count_p2;
3087
+ __le64 active_qp_count_p3;
29323088 };
29333089
29343090 /* QP error notification event (16 bytes) */