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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2015 Samsung Electronics Co.Ltd |
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3 | 4 | * Authors: |
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4 | 5 | * Hyungwon Hwang <human.hwang@samsung.com> |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or modify |
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7 | | - * it under the terms of the GNU General Public License version 2 as |
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8 | | - * published by the Free Software Foundationr |
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9 | 6 | */ |
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10 | 7 | |
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11 | | -#include <linux/platform_device.h> |
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12 | | -#include <video/of_videomode.h> |
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13 | | -#include <linux/of_address.h> |
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14 | | -#include <video/videomode.h> |
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15 | | -#include <linux/module.h> |
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16 | | -#include <linux/delay.h> |
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17 | | -#include <linux/mutex.h> |
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18 | | -#include <linux/of.h> |
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19 | | -#include <linux/of_graph.h> |
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20 | 8 | #include <linux/clk.h> |
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21 | 9 | #include <linux/component.h> |
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22 | | -#include <linux/pm_runtime.h> |
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23 | | -#include <drm/drmP.h> |
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24 | | -#include <drm/drm_encoder.h> |
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| 10 | +#include <linux/delay.h> |
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25 | 11 | #include <linux/mfd/syscon.h> |
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| 12 | +#include <linux/module.h> |
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| 13 | +#include <linux/mutex.h> |
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| 14 | +#include <linux/of.h> |
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| 15 | +#include <linux/of_address.h> |
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| 16 | +#include <linux/of_graph.h> |
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| 17 | +#include <linux/platform_device.h> |
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| 18 | +#include <linux/pm_runtime.h> |
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26 | 19 | #include <linux/regmap.h> |
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| 20 | + |
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| 21 | +#include <video/of_videomode.h> |
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| 22 | +#include <video/videomode.h> |
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| 23 | + |
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| 24 | +#include <drm/drm_bridge.h> |
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| 25 | +#include <drm/drm_encoder.h> |
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| 26 | +#include <drm/drm_print.h> |
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27 | 27 | |
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28 | 28 | #include "exynos_drm_drv.h" |
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29 | 29 | |
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.. | .. |
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88 | 88 | |
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89 | 89 | #define MIC_BS_SIZE_2D(x) ((x) & 0x3fff) |
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90 | 90 | |
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91 | | -static char *clk_names[] = { "pclk_mic0", "sclk_rgb_vclk_to_mic0" }; |
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| 91 | +static const char *const clk_names[] = { "pclk_mic0", "sclk_rgb_vclk_to_mic0" }; |
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92 | 92 | #define NUM_CLKS ARRAY_SIZE(clk_names) |
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93 | 93 | static DEFINE_MUTEX(mic_mutex); |
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94 | 94 | |
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.. | .. |
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113 | 113 | |
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114 | 114 | ret = regmap_read(mic->sysreg, DSD_CFG_MUX, &val); |
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115 | 115 | if (ret) { |
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116 | | - DRM_ERROR("mic: Failed to read system register\n"); |
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| 116 | + DRM_DEV_ERROR(mic->dev, |
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| 117 | + "mic: Failed to read system register\n"); |
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117 | 118 | return; |
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118 | 119 | } |
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119 | 120 | |
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.. | .. |
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129 | 130 | |
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130 | 131 | ret = regmap_write(mic->sysreg, DSD_CFG_MUX, val); |
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131 | 132 | if (ret) |
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132 | | - DRM_ERROR("mic: Failed to read system register\n"); |
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| 133 | + DRM_DEV_ERROR(mic->dev, |
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| 134 | + "mic: Failed to read system register\n"); |
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133 | 135 | } |
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134 | 136 | |
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135 | 137 | static int mic_sw_reset(struct exynos_mic *mic) |
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.. | .. |
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190 | 192 | struct videomode vm = mic->vm; |
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191 | 193 | u32 reg, bs_size_2d; |
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192 | 194 | |
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193 | | - DRM_DEBUG("w: %u, h: %u\n", vm.hactive, vm.vactive); |
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| 195 | + DRM_DEV_DEBUG(mic->dev, "w: %u, h: %u\n", vm.hactive, vm.vactive); |
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194 | 196 | bs_size_2d = ((vm.hactive >> 2) << 1) + (vm.vactive % 4); |
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195 | 197 | reg = MIC_BS_SIZE_2D(bs_size_2d); |
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196 | 198 | writel(reg, mic->reg + MIC_2D_OUTPUT_TIMING_2); |
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.. | .. |
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246 | 248 | } |
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247 | 249 | |
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248 | 250 | static void mic_mode_set(struct drm_bridge *bridge, |
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249 | | - struct drm_display_mode *mode, |
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250 | | - struct drm_display_mode *adjusted_mode) |
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| 251 | + const struct drm_display_mode *mode, |
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| 252 | + const struct drm_display_mode *adjusted_mode) |
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251 | 253 | { |
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252 | 254 | struct exynos_mic *mic = bridge->driver_private; |
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253 | 255 | |
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.. | .. |
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276 | 278 | |
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277 | 279 | ret = mic_sw_reset(mic); |
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278 | 280 | if (ret) { |
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279 | | - DRM_ERROR("Failed to reset\n"); |
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| 281 | + DRM_DEV_ERROR(mic->dev, "Failed to reset\n"); |
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280 | 282 | goto turn_off; |
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281 | 283 | } |
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282 | 284 | |
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.. | .. |
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356 | 358 | for (i = 0; i < NUM_CLKS; i++) { |
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357 | 359 | ret = clk_prepare_enable(mic->clks[i]); |
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358 | 360 | if (ret < 0) { |
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359 | | - DRM_ERROR("Failed to enable clock (%s)\n", |
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360 | | - clk_names[i]); |
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| 361 | + DRM_DEV_ERROR(dev, "Failed to enable clock (%s)\n", |
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| 362 | + clk_names[i]); |
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361 | 363 | while (--i > -1) |
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362 | 364 | clk_disable_unprepare(mic->clks[i]); |
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363 | 365 | return ret; |
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.. | .. |
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382 | 384 | |
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383 | 385 | mic = devm_kzalloc(dev, sizeof(*mic), GFP_KERNEL); |
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384 | 386 | if (!mic) { |
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385 | | - DRM_ERROR("mic: Failed to allocate memory for MIC object\n"); |
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| 387 | + DRM_DEV_ERROR(dev, |
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| 388 | + "mic: Failed to allocate memory for MIC object\n"); |
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386 | 389 | ret = -ENOMEM; |
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387 | 390 | goto err; |
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388 | 391 | } |
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.. | .. |
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391 | 394 | |
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392 | 395 | ret = of_address_to_resource(dev->of_node, 0, &res); |
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393 | 396 | if (ret) { |
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394 | | - DRM_ERROR("mic: Failed to get mem region for MIC\n"); |
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| 397 | + DRM_DEV_ERROR(dev, "mic: Failed to get mem region for MIC\n"); |
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395 | 398 | goto err; |
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396 | 399 | } |
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397 | 400 | mic->reg = devm_ioremap(dev, res.start, resource_size(&res)); |
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398 | 401 | if (!mic->reg) { |
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399 | | - DRM_ERROR("mic: Failed to remap for MIC\n"); |
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| 402 | + DRM_DEV_ERROR(dev, "mic: Failed to remap for MIC\n"); |
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400 | 403 | ret = -ENOMEM; |
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401 | 404 | goto err; |
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402 | 405 | } |
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.. | .. |
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404 | 407 | mic->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node, |
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405 | 408 | "samsung,disp-syscon"); |
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406 | 409 | if (IS_ERR(mic->sysreg)) { |
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407 | | - DRM_ERROR("mic: Failed to get system register.\n"); |
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| 410 | + DRM_DEV_ERROR(dev, "mic: Failed to get system register.\n"); |
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408 | 411 | ret = PTR_ERR(mic->sysreg); |
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409 | 412 | goto err; |
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410 | 413 | } |
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.. | .. |
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412 | 415 | for (i = 0; i < NUM_CLKS; i++) { |
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413 | 416 | mic->clks[i] = devm_clk_get(dev, clk_names[i]); |
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414 | 417 | if (IS_ERR(mic->clks[i])) { |
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415 | | - DRM_ERROR("mic: Failed to get clock (%s)\n", |
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416 | | - clk_names[i]); |
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| 418 | + DRM_DEV_ERROR(dev, "mic: Failed to get clock (%s)\n", |
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| 419 | + clk_names[i]); |
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417 | 420 | ret = PTR_ERR(mic->clks[i]); |
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418 | 421 | goto err; |
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419 | 422 | } |
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.. | .. |
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432 | 435 | if (ret) |
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433 | 436 | goto err_pm; |
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434 | 437 | |
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435 | | - DRM_DEBUG_KMS("MIC has been probed\n"); |
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| 438 | + DRM_DEV_DEBUG_KMS(dev, "MIC has been probed\n"); |
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436 | 439 | |
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437 | 440 | return 0; |
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438 | 441 | |
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