hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/gpu/drm/exynos/exynos_drm_ipp.h
....@@ -1,16 +1,10 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23 * Copyright (c) 2017 Samsung Electronics Co., Ltd.
3
- *
4
- * This program is free software; you can redistribute it and/or modify it
5
- * under the terms of the GNU General Public License as published by the
6
- * Free Software Foundation; either version 2 of the License, or (at your
7
- * option) any later version.
84 */
95
106 #ifndef _EXYNOS_DRM_IPP_H_
117 #define _EXYNOS_DRM_IPP_H_
12
-
13
-#include <drm/drmP.h>
148
159 struct exynos_drm_ipp;
1610 struct exynos_drm_ipp_task;
....@@ -54,7 +48,8 @@
5448 * struct exynos_drm_ipp - central picture processor module structure
5549 */
5650 struct exynos_drm_ipp {
57
- struct drm_device *dev;
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+ struct drm_device *drm_dev;
52
+ struct device *dev;
5853 struct list_head head;
5954 unsigned int id;
6055
....@@ -85,7 +80,7 @@
8580 * has to be performed by the picture processor hardware module
8681 */
8782 struct exynos_drm_ipp_task {
88
- struct drm_device *dev;
83
+ struct device *dev;
8984 struct exynos_drm_ipp *ipp;
9085 struct list_head head;
9186
....@@ -129,11 +124,11 @@
129124 #define IPP_SCALE_LIMIT(val...) \
130125 .type = (DRM_EXYNOS_IPP_LIMIT_TYPE_SCALE), val
131126
132
-int exynos_drm_ipp_register(struct drm_device *dev, struct exynos_drm_ipp *ipp,
127
+int exynos_drm_ipp_register(struct device *dev, struct exynos_drm_ipp *ipp,
133128 const struct exynos_drm_ipp_funcs *funcs, unsigned int caps,
134129 const struct exynos_drm_ipp_formats *formats,
135130 unsigned int num_formats, const char *name);
136
-void exynos_drm_ipp_unregister(struct drm_device *dev,
131
+void exynos_drm_ipp_unregister(struct device *dev,
137132 struct exynos_drm_ipp *ipp);
138133
139134 void exynos_drm_ipp_task_done(struct exynos_drm_ipp_task *task, int ret);