.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2012 Samsung Electronics Co.Ltd |
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3 | 4 | * Authors: |
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4 | 5 | * Eunchul Kim <chulspro.kim@samsung.com> |
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5 | 6 | * Jinyoung Jeon <jy0.jeon@samsung.com> |
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6 | 7 | * Sangmin Lee <lsmin.lee@samsung.com> |
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7 | | - * |
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8 | | - * This program is free software; you can redistribute it and/or modify it |
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9 | | - * under the terms of the GNU General Public License as published by the |
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10 | | - * Free Software Foundation; either version 2 of the License, or (at your |
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11 | | - * option) any later version. |
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12 | | - * |
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13 | 8 | */ |
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14 | | -#include <linux/kernel.h> |
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15 | | -#include <linux/component.h> |
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16 | | -#include <linux/platform_device.h> |
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| 9 | + |
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17 | 10 | #include <linux/clk.h> |
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18 | | -#include <linux/pm_runtime.h> |
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| 11 | +#include <linux/component.h> |
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| 12 | +#include <linux/kernel.h> |
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19 | 13 | #include <linux/mfd/syscon.h> |
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20 | 14 | #include <linux/of_device.h> |
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| 15 | +#include <linux/platform_device.h> |
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| 16 | +#include <linux/pm_runtime.h> |
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21 | 17 | #include <linux/regmap.h> |
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22 | 18 | |
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23 | | -#include <drm/drmP.h> |
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| 19 | +#include <drm/drm_fourcc.h> |
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| 20 | +#include <drm/drm_print.h> |
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24 | 21 | #include <drm/exynos_drm.h> |
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25 | | -#include "regs-gsc.h" |
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| 22 | + |
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26 | 23 | #include "exynos_drm_drv.h" |
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27 | | -#include "exynos_drm_iommu.h" |
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28 | 24 | #include "exynos_drm_ipp.h" |
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| 25 | +#include "regs-gsc.h" |
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29 | 26 | |
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30 | 27 | /* |
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31 | 28 | * GSC stands for General SCaler and |
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.. | .. |
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63 | 60 | #define GSC_COEF_DEPTH 3 |
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64 | 61 | #define GSC_AUTOSUSPEND_DELAY 2000 |
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65 | 62 | |
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66 | | -#define get_gsc_context(dev) platform_get_drvdata(to_platform_device(dev)) |
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| 63 | +#define get_gsc_context(dev) dev_get_drvdata(dev) |
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67 | 64 | #define gsc_read(offset) readl(ctx->regs + (offset)) |
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68 | 65 | #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset)) |
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69 | 66 | |
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.. | .. |
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100 | 97 | struct gsc_context { |
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101 | 98 | struct exynos_drm_ipp ipp; |
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102 | 99 | struct drm_device *drm_dev; |
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| 100 | + void *dma_priv; |
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103 | 101 | struct device *dev; |
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104 | 102 | struct exynos_drm_ipp_task *task; |
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105 | 103 | struct exynos_drm_ipp_formats *formats; |
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.. | .. |
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396 | 394 | } |
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397 | 395 | |
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398 | 396 | if (cfg) { |
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399 | | - DRM_ERROR("failed to reset gsc h/w.\n"); |
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| 397 | + DRM_DEV_ERROR(ctx->dev, "failed to reset gsc h/w.\n"); |
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400 | 398 | return -EBUSY; |
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401 | 399 | } |
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402 | 400 | |
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.. | .. |
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423 | 421 | { |
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424 | 422 | u32 cfg; |
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425 | 423 | |
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426 | | - DRM_DEBUG_KMS("enable[%d]overflow[%d]level[%d]\n", |
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427 | | - enable, overflow, done); |
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| 424 | + DRM_DEV_DEBUG_KMS(ctx->dev, "enable[%d]overflow[%d]level[%d]\n", |
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| 425 | + enable, overflow, done); |
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428 | 426 | |
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429 | 427 | cfg = gsc_read(GSC_IRQ); |
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430 | 428 | cfg |= (GSC_IRQ_OR_MASK | GSC_IRQ_FRMDONE_MASK); |
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.. | .. |
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448 | 446 | } |
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449 | 447 | |
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450 | 448 | |
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451 | | -static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt) |
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| 449 | +static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled) |
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452 | 450 | { |
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453 | 451 | u32 cfg; |
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454 | 452 | |
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455 | | - DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
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| 453 | + DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); |
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456 | 454 | |
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457 | 455 | cfg = gsc_read(GSC_IN_CON); |
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458 | 456 | cfg &= ~(GSC_IN_RGB_TYPE_MASK | GSC_IN_YUV422_1P_ORDER_MASK | |
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.. | .. |
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513 | 511 | cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV422_2P); |
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514 | 512 | break; |
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515 | 513 | } |
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| 514 | + |
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| 515 | + if (tiled) |
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| 516 | + cfg |= (GSC_IN_TILE_C_16x8 | GSC_IN_TILE_MODE); |
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516 | 517 | |
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517 | 518 | gsc_write(cfg, GSC_IN_CON); |
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518 | 519 | } |
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.. | .. |
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632 | 633 | gsc_src_set_buf_seq(ctx, buf_id, true); |
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633 | 634 | } |
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634 | 635 | |
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635 | | -static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt) |
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| 636 | +static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled) |
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636 | 637 | { |
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637 | 638 | u32 cfg; |
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638 | 639 | |
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639 | | - DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
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| 640 | + DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); |
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640 | 641 | |
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641 | 642 | cfg = gsc_read(GSC_OUT_CON); |
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642 | 643 | cfg &= ~(GSC_OUT_RGB_TYPE_MASK | GSC_OUT_YUV422_1P_ORDER_MASK | |
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.. | .. |
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698 | 699 | break; |
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699 | 700 | } |
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700 | 701 | |
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| 702 | + if (tiled) |
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| 703 | + cfg |= (GSC_IN_TILE_C_16x8 | GSC_OUT_TILE_MODE); |
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| 704 | + |
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701 | 705 | gsc_write(cfg, GSC_OUT_CON); |
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702 | 706 | } |
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703 | 707 | |
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704 | | -static int gsc_get_ratio_shift(u32 src, u32 dst, u32 *ratio) |
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| 708 | +static int gsc_get_ratio_shift(struct gsc_context *ctx, u32 src, u32 dst, |
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| 709 | + u32 *ratio) |
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705 | 710 | { |
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706 | | - DRM_DEBUG_KMS("src[%d]dst[%d]\n", src, dst); |
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| 711 | + DRM_DEV_DEBUG_KMS(ctx->dev, "src[%d]dst[%d]\n", src, dst); |
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707 | 712 | |
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708 | 713 | if (src >= dst * 8) { |
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709 | | - DRM_ERROR("failed to make ratio and shift.\n"); |
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| 714 | + DRM_DEV_ERROR(ctx->dev, "failed to make ratio and shift.\n"); |
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710 | 715 | return -EINVAL; |
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711 | 716 | } else if (src >= dst * 4) |
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712 | 717 | *ratio = 4; |
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.. | .. |
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754 | 759 | dst_h = dst->h; |
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755 | 760 | } |
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756 | 761 | |
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757 | | - ret = gsc_get_ratio_shift(src_w, dst_w, &sc->pre_hratio); |
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| 762 | + ret = gsc_get_ratio_shift(ctx, src_w, dst_w, &sc->pre_hratio); |
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758 | 763 | if (ret) { |
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759 | | - dev_err(ctx->dev, "failed to get ratio horizontal.\n"); |
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| 764 | + DRM_DEV_ERROR(ctx->dev, "failed to get ratio horizontal.\n"); |
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760 | 765 | return ret; |
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761 | 766 | } |
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762 | 767 | |
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763 | | - ret = gsc_get_ratio_shift(src_h, dst_h, &sc->pre_vratio); |
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| 768 | + ret = gsc_get_ratio_shift(ctx, src_h, dst_h, &sc->pre_vratio); |
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764 | 769 | if (ret) { |
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765 | | - dev_err(ctx->dev, "failed to get ratio vertical.\n"); |
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| 770 | + DRM_DEV_ERROR(ctx->dev, "failed to get ratio vertical.\n"); |
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766 | 771 | return ret; |
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767 | 772 | } |
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768 | 773 | |
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769 | | - DRM_DEBUG_KMS("pre_hratio[%d]pre_vratio[%d]\n", |
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770 | | - sc->pre_hratio, sc->pre_vratio); |
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| 774 | + DRM_DEV_DEBUG_KMS(ctx->dev, "pre_hratio[%d]pre_vratio[%d]\n", |
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| 775 | + sc->pre_hratio, sc->pre_vratio); |
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771 | 776 | |
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772 | 777 | sc->main_hratio = (src_w << 16) / dst_w; |
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773 | 778 | sc->main_vratio = (src_h << 16) / dst_h; |
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774 | 779 | |
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775 | | - DRM_DEBUG_KMS("main_hratio[%ld]main_vratio[%ld]\n", |
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776 | | - sc->main_hratio, sc->main_vratio); |
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| 780 | + DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n", |
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| 781 | + sc->main_hratio, sc->main_vratio); |
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777 | 782 | |
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778 | 783 | gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio, |
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779 | 784 | &sc->pre_shfactor); |
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780 | 785 | |
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781 | | - DRM_DEBUG_KMS("pre_shfactor[%d]\n", sc->pre_shfactor); |
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| 786 | + DRM_DEV_DEBUG_KMS(ctx->dev, "pre_shfactor[%d]\n", sc->pre_shfactor); |
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782 | 787 | |
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783 | 788 | cfg = (GSC_PRESC_SHFACTOR(sc->pre_shfactor) | |
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784 | 789 | GSC_PRESC_H_RATIO(sc->pre_hratio) | |
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.. | .. |
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844 | 849 | { |
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845 | 850 | u32 cfg; |
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846 | 851 | |
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847 | | - DRM_DEBUG_KMS("main_hratio[%ld]main_vratio[%ld]\n", |
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848 | | - sc->main_hratio, sc->main_vratio); |
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| 852 | + DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n", |
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| 853 | + sc->main_hratio, sc->main_vratio); |
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849 | 854 | |
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850 | 855 | gsc_set_h_coef(ctx, sc->main_hratio); |
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851 | 856 | cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio); |
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.. | .. |
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911 | 916 | if (cfg & (mask << i)) |
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912 | 917 | buf_num--; |
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913 | 918 | |
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914 | | - DRM_DEBUG_KMS("buf_num[%d]\n", buf_num); |
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| 919 | + DRM_DEV_DEBUG_KMS(ctx->dev, "buf_num[%d]\n", buf_num); |
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915 | 920 | |
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916 | 921 | return buf_num; |
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917 | 922 | } |
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.. | .. |
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958 | 963 | u32 cfg, curr_index, i; |
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959 | 964 | u32 buf_id = GSC_MAX_SRC; |
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960 | 965 | |
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961 | | - DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id); |
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| 966 | + DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id); |
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962 | 967 | |
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963 | 968 | cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); |
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964 | 969 | curr_index = GSC_IN_CURR_GET_INDEX(cfg); |
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.. | .. |
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970 | 975 | } |
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971 | 976 | } |
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972 | 977 | |
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973 | | - DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, |
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974 | | - curr_index, buf_id); |
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| 978 | + DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, |
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| 979 | + curr_index, buf_id); |
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975 | 980 | |
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976 | 981 | if (buf_id == GSC_MAX_SRC) { |
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977 | | - DRM_ERROR("failed to get in buffer index.\n"); |
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| 982 | + DRM_DEV_ERROR(ctx->dev, "failed to get in buffer index.\n"); |
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978 | 983 | return -EINVAL; |
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979 | 984 | } |
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980 | 985 | |
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.. | .. |
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988 | 993 | u32 cfg, curr_index, i; |
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989 | 994 | u32 buf_id = GSC_MAX_DST; |
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990 | 995 | |
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991 | | - DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id); |
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| 996 | + DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id); |
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992 | 997 | |
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993 | 998 | cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); |
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994 | 999 | curr_index = GSC_OUT_CURR_GET_INDEX(cfg); |
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.. | .. |
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1001 | 1006 | } |
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1002 | 1007 | |
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1003 | 1008 | if (buf_id == GSC_MAX_DST) { |
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1004 | | - DRM_ERROR("failed to get out buffer index.\n"); |
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| 1009 | + DRM_DEV_ERROR(ctx->dev, "failed to get out buffer index.\n"); |
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1005 | 1010 | return -EINVAL; |
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1006 | 1011 | } |
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1007 | 1012 | |
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1008 | 1013 | gsc_dst_set_buf_seq(ctx, buf_id, false); |
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1009 | 1014 | |
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1010 | | - DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, |
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1011 | | - curr_index, buf_id); |
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| 1015 | + DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, |
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| 1016 | + curr_index, buf_id); |
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1012 | 1017 | |
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1013 | 1018 | return buf_id; |
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1014 | 1019 | } |
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.. | .. |
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1019 | 1024 | u32 status; |
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1020 | 1025 | int err = 0; |
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1021 | 1026 | |
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1022 | | - DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id); |
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| 1027 | + DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id); |
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1023 | 1028 | |
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1024 | 1029 | status = gsc_read(GSC_IRQ); |
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1025 | 1030 | if (status & GSC_IRQ_STATUS_OR_IRQ) { |
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.. | .. |
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1037 | 1042 | src_buf_id = gsc_get_src_buf_index(ctx); |
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1038 | 1043 | dst_buf_id = gsc_get_dst_buf_index(ctx); |
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1039 | 1044 | |
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1040 | | - DRM_DEBUG_KMS("buf_id_src[%d]buf_id_dst[%d]\n", src_buf_id, |
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1041 | | - dst_buf_id); |
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| 1045 | + DRM_DEV_DEBUG_KMS(ctx->dev, "buf_id_src[%d]buf_id_dst[%d]\n", |
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| 1046 | + src_buf_id, dst_buf_id); |
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1042 | 1047 | |
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1043 | 1048 | if (src_buf_id < 0 || dst_buf_id < 0) |
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1044 | 1049 | err = -EINVAL; |
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.. | .. |
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1122 | 1127 | return ret; |
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1123 | 1128 | } |
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1124 | 1129 | |
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1125 | | - gsc_src_set_fmt(ctx, task->src.buf.fourcc); |
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| 1130 | + gsc_src_set_fmt(ctx, task->src.buf.fourcc, task->src.buf.modifier); |
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1126 | 1131 | gsc_src_set_transf(ctx, task->transform.rotation); |
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1127 | 1132 | gsc_src_set_size(ctx, &task->src); |
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1128 | 1133 | gsc_src_set_addr(ctx, 0, &task->src); |
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1129 | | - gsc_dst_set_fmt(ctx, task->dst.buf.fourcc); |
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| 1134 | + gsc_dst_set_fmt(ctx, task->dst.buf.fourcc, task->dst.buf.modifier); |
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1130 | 1135 | gsc_dst_set_size(ctx, &task->dst); |
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1131 | 1136 | gsc_dst_set_addr(ctx, 0, &task->dst); |
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1132 | 1137 | gsc_set_prescaler(ctx, &ctx->sc, &task->src.rect, &task->dst.rect); |
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.. | .. |
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1164 | 1169 | struct exynos_drm_ipp *ipp = &ctx->ipp; |
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1165 | 1170 | |
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1166 | 1171 | ctx->drm_dev = drm_dev; |
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1167 | | - drm_iommu_attach_device(drm_dev, dev); |
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| 1172 | + ctx->drm_dev = drm_dev; |
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| 1173 | + exynos_drm_register_dma(drm_dev, dev, &ctx->dma_priv); |
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1168 | 1174 | |
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1169 | | - exynos_drm_ipp_register(drm_dev, ipp, &ipp_funcs, |
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| 1175 | + exynos_drm_ipp_register(dev, ipp, &ipp_funcs, |
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1170 | 1176 | DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE | |
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1171 | 1177 | DRM_EXYNOS_IPP_CAP_SCALE | DRM_EXYNOS_IPP_CAP_CONVERT, |
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1172 | 1178 | ctx->formats, ctx->num_formats, "gsc"); |
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.. | .. |
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1183 | 1189 | struct drm_device *drm_dev = data; |
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1184 | 1190 | struct exynos_drm_ipp *ipp = &ctx->ipp; |
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1185 | 1191 | |
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1186 | | - exynos_drm_ipp_unregister(drm_dev, ipp); |
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1187 | | - drm_iommu_detach_device(drm_dev, dev); |
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| 1192 | + exynos_drm_ipp_unregister(dev, ipp); |
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| 1193 | + exynos_drm_unregister_dma(drm_dev, dev, &ctx->dma_priv); |
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1188 | 1194 | } |
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1189 | 1195 | |
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1190 | 1196 | static const struct component_ops gsc_component_ops = { |
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.. | .. |
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1200 | 1206 | DRM_FORMAT_YUV420, DRM_FORMAT_YVU420, DRM_FORMAT_YUV422, |
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1201 | 1207 | }; |
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1202 | 1208 | |
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| 1209 | +static const unsigned int gsc_tiled_formats[] = { |
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| 1210 | + DRM_FORMAT_NV12, DRM_FORMAT_NV21, |
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| 1211 | +}; |
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| 1212 | + |
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1203 | 1213 | static int gsc_probe(struct platform_device *pdev) |
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1204 | 1214 | { |
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1205 | 1215 | struct device *dev = &pdev->dev; |
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.. | .. |
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1207 | 1217 | struct exynos_drm_ipp_formats *formats; |
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1208 | 1218 | struct gsc_context *ctx; |
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1209 | 1219 | struct resource *res; |
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1210 | | - int ret, i; |
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| 1220 | + int num_formats, ret, i, j; |
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1211 | 1221 | |
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1212 | 1222 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); |
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1213 | 1223 | if (!ctx) |
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1214 | | - return -ENOMEM; |
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1215 | | - |
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1216 | | - formats = devm_kcalloc(dev, |
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1217 | | - ARRAY_SIZE(gsc_formats), sizeof(*formats), |
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1218 | | - GFP_KERNEL); |
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1219 | | - if (!formats) |
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1220 | 1224 | return -ENOMEM; |
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1221 | 1225 | |
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1222 | 1226 | driver_data = (struct gsc_driverdata *)of_device_get_match_data(dev); |
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.. | .. |
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1224 | 1228 | ctx->num_clocks = driver_data->num_clocks; |
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1225 | 1229 | ctx->clk_names = driver_data->clk_names; |
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1226 | 1230 | |
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| 1231 | + /* construct formats/limits array */ |
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| 1232 | + num_formats = ARRAY_SIZE(gsc_formats) + ARRAY_SIZE(gsc_tiled_formats); |
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| 1233 | + formats = devm_kcalloc(dev, num_formats, sizeof(*formats), GFP_KERNEL); |
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| 1234 | + if (!formats) |
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| 1235 | + return -ENOMEM; |
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| 1236 | + |
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| 1237 | + /* linear formats */ |
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1227 | 1238 | for (i = 0; i < ARRAY_SIZE(gsc_formats); i++) { |
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1228 | 1239 | formats[i].fourcc = gsc_formats[i]; |
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1229 | 1240 | formats[i].type = DRM_EXYNOS_IPP_FORMAT_SOURCE | |
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.. | .. |
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1231 | 1242 | formats[i].limits = driver_data->limits; |
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1232 | 1243 | formats[i].num_limits = driver_data->num_limits; |
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1233 | 1244 | } |
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| 1245 | + |
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| 1246 | + /* tiled formats */ |
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| 1247 | + for (j = i, i = 0; i < ARRAY_SIZE(gsc_tiled_formats); j++, i++) { |
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| 1248 | + formats[j].fourcc = gsc_tiled_formats[i]; |
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| 1249 | + formats[j].modifier = DRM_FORMAT_MOD_SAMSUNG_16_16_TILE; |
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| 1250 | + formats[j].type = DRM_EXYNOS_IPP_FORMAT_SOURCE | |
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| 1251 | + DRM_EXYNOS_IPP_FORMAT_DESTINATION; |
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| 1252 | + formats[j].limits = driver_data->limits; |
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| 1253 | + formats[j].num_limits = driver_data->num_limits; |
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| 1254 | + } |
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| 1255 | + |
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1234 | 1256 | ctx->formats = formats; |
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1235 | | - ctx->num_formats = ARRAY_SIZE(gsc_formats); |
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| 1257 | + ctx->num_formats = num_formats; |
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1236 | 1258 | |
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1237 | 1259 | /* clock control */ |
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1238 | 1260 | for (i = 0; i < ctx->num_clocks; i++) { |
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.. | .. |
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1304 | 1326 | struct gsc_context *ctx = get_gsc_context(dev); |
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1305 | 1327 | int i; |
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1306 | 1328 | |
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1307 | | - DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
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| 1329 | + DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id); |
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1308 | 1330 | |
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1309 | 1331 | for (i = ctx->num_clocks - 1; i >= 0; i--) |
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1310 | 1332 | clk_disable_unprepare(ctx->clocks[i]); |
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.. | .. |
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1317 | 1339 | struct gsc_context *ctx = get_gsc_context(dev); |
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1318 | 1340 | int i, ret; |
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1319 | 1341 | |
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1320 | | - DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
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| 1342 | + DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id); |
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1321 | 1343 | |
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1322 | 1344 | for (i = 0; i < ctx->num_clocks; i++) { |
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1323 | 1345 | ret = clk_prepare_enable(ctx->clocks[i]); |
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