hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/gpu/drm/exynos/exynos_drm_gsc.c
....@@ -1,31 +1,28 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * Copyright (C) 2012 Samsung Electronics Co.Ltd
34 * Authors:
45 * Eunchul Kim <chulspro.kim@samsung.com>
56 * Jinyoung Jeon <jy0.jeon@samsung.com>
67 * Sangmin Lee <lsmin.lee@samsung.com>
7
- *
8
- * This program is free software; you can redistribute it and/or modify it
9
- * under the terms of the GNU General Public License as published by the
10
- * Free Software Foundation; either version 2 of the License, or (at your
11
- * option) any later version.
12
- *
138 */
14
-#include <linux/kernel.h>
15
-#include <linux/component.h>
16
-#include <linux/platform_device.h>
9
+
1710 #include <linux/clk.h>
18
-#include <linux/pm_runtime.h>
11
+#include <linux/component.h>
12
+#include <linux/kernel.h>
1913 #include <linux/mfd/syscon.h>
2014 #include <linux/of_device.h>
15
+#include <linux/platform_device.h>
16
+#include <linux/pm_runtime.h>
2117 #include <linux/regmap.h>
2218
23
-#include <drm/drmP.h>
19
+#include <drm/drm_fourcc.h>
20
+#include <drm/drm_print.h>
2421 #include <drm/exynos_drm.h>
25
-#include "regs-gsc.h"
22
+
2623 #include "exynos_drm_drv.h"
27
-#include "exynos_drm_iommu.h"
2824 #include "exynos_drm_ipp.h"
25
+#include "regs-gsc.h"
2926
3027 /*
3128 * GSC stands for General SCaler and
....@@ -63,7 +60,7 @@
6360 #define GSC_COEF_DEPTH 3
6461 #define GSC_AUTOSUSPEND_DELAY 2000
6562
66
-#define get_gsc_context(dev) platform_get_drvdata(to_platform_device(dev))
63
+#define get_gsc_context(dev) dev_get_drvdata(dev)
6764 #define gsc_read(offset) readl(ctx->regs + (offset))
6865 #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset))
6966
....@@ -100,6 +97,7 @@
10097 struct gsc_context {
10198 struct exynos_drm_ipp ipp;
10299 struct drm_device *drm_dev;
100
+ void *dma_priv;
103101 struct device *dev;
104102 struct exynos_drm_ipp_task *task;
105103 struct exynos_drm_ipp_formats *formats;
....@@ -396,7 +394,7 @@
396394 }
397395
398396 if (cfg) {
399
- DRM_ERROR("failed to reset gsc h/w.\n");
397
+ DRM_DEV_ERROR(ctx->dev, "failed to reset gsc h/w.\n");
400398 return -EBUSY;
401399 }
402400
....@@ -423,8 +421,8 @@
423421 {
424422 u32 cfg;
425423
426
- DRM_DEBUG_KMS("enable[%d]overflow[%d]level[%d]\n",
427
- enable, overflow, done);
424
+ DRM_DEV_DEBUG_KMS(ctx->dev, "enable[%d]overflow[%d]level[%d]\n",
425
+ enable, overflow, done);
428426
429427 cfg = gsc_read(GSC_IRQ);
430428 cfg |= (GSC_IRQ_OR_MASK | GSC_IRQ_FRMDONE_MASK);
....@@ -448,11 +446,11 @@
448446 }
449447
450448
451
-static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt)
449
+static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled)
452450 {
453451 u32 cfg;
454452
455
- DRM_DEBUG_KMS("fmt[0x%x]\n", fmt);
453
+ DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt);
456454
457455 cfg = gsc_read(GSC_IN_CON);
458456 cfg &= ~(GSC_IN_RGB_TYPE_MASK | GSC_IN_YUV422_1P_ORDER_MASK |
....@@ -513,6 +511,9 @@
513511 cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV422_2P);
514512 break;
515513 }
514
+
515
+ if (tiled)
516
+ cfg |= (GSC_IN_TILE_C_16x8 | GSC_IN_TILE_MODE);
516517
517518 gsc_write(cfg, GSC_IN_CON);
518519 }
....@@ -632,11 +633,11 @@
632633 gsc_src_set_buf_seq(ctx, buf_id, true);
633634 }
634635
635
-static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt)
636
+static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt, bool tiled)
636637 {
637638 u32 cfg;
638639
639
- DRM_DEBUG_KMS("fmt[0x%x]\n", fmt);
640
+ DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt);
640641
641642 cfg = gsc_read(GSC_OUT_CON);
642643 cfg &= ~(GSC_OUT_RGB_TYPE_MASK | GSC_OUT_YUV422_1P_ORDER_MASK |
....@@ -698,15 +699,19 @@
698699 break;
699700 }
700701
702
+ if (tiled)
703
+ cfg |= (GSC_IN_TILE_C_16x8 | GSC_OUT_TILE_MODE);
704
+
701705 gsc_write(cfg, GSC_OUT_CON);
702706 }
703707
704
-static int gsc_get_ratio_shift(u32 src, u32 dst, u32 *ratio)
708
+static int gsc_get_ratio_shift(struct gsc_context *ctx, u32 src, u32 dst,
709
+ u32 *ratio)
705710 {
706
- DRM_DEBUG_KMS("src[%d]dst[%d]\n", src, dst);
711
+ DRM_DEV_DEBUG_KMS(ctx->dev, "src[%d]dst[%d]\n", src, dst);
707712
708713 if (src >= dst * 8) {
709
- DRM_ERROR("failed to make ratio and shift.\n");
714
+ DRM_DEV_ERROR(ctx->dev, "failed to make ratio and shift.\n");
710715 return -EINVAL;
711716 } else if (src >= dst * 4)
712717 *ratio = 4;
....@@ -754,31 +759,31 @@
754759 dst_h = dst->h;
755760 }
756761
757
- ret = gsc_get_ratio_shift(src_w, dst_w, &sc->pre_hratio);
762
+ ret = gsc_get_ratio_shift(ctx, src_w, dst_w, &sc->pre_hratio);
758763 if (ret) {
759
- dev_err(ctx->dev, "failed to get ratio horizontal.\n");
764
+ DRM_DEV_ERROR(ctx->dev, "failed to get ratio horizontal.\n");
760765 return ret;
761766 }
762767
763
- ret = gsc_get_ratio_shift(src_h, dst_h, &sc->pre_vratio);
768
+ ret = gsc_get_ratio_shift(ctx, src_h, dst_h, &sc->pre_vratio);
764769 if (ret) {
765
- dev_err(ctx->dev, "failed to get ratio vertical.\n");
770
+ DRM_DEV_ERROR(ctx->dev, "failed to get ratio vertical.\n");
766771 return ret;
767772 }
768773
769
- DRM_DEBUG_KMS("pre_hratio[%d]pre_vratio[%d]\n",
770
- sc->pre_hratio, sc->pre_vratio);
774
+ DRM_DEV_DEBUG_KMS(ctx->dev, "pre_hratio[%d]pre_vratio[%d]\n",
775
+ sc->pre_hratio, sc->pre_vratio);
771776
772777 sc->main_hratio = (src_w << 16) / dst_w;
773778 sc->main_vratio = (src_h << 16) / dst_h;
774779
775
- DRM_DEBUG_KMS("main_hratio[%ld]main_vratio[%ld]\n",
776
- sc->main_hratio, sc->main_vratio);
780
+ DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n",
781
+ sc->main_hratio, sc->main_vratio);
777782
778783 gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio,
779784 &sc->pre_shfactor);
780785
781
- DRM_DEBUG_KMS("pre_shfactor[%d]\n", sc->pre_shfactor);
786
+ DRM_DEV_DEBUG_KMS(ctx->dev, "pre_shfactor[%d]\n", sc->pre_shfactor);
782787
783788 cfg = (GSC_PRESC_SHFACTOR(sc->pre_shfactor) |
784789 GSC_PRESC_H_RATIO(sc->pre_hratio) |
....@@ -844,8 +849,8 @@
844849 {
845850 u32 cfg;
846851
847
- DRM_DEBUG_KMS("main_hratio[%ld]main_vratio[%ld]\n",
848
- sc->main_hratio, sc->main_vratio);
852
+ DRM_DEV_DEBUG_KMS(ctx->dev, "main_hratio[%ld]main_vratio[%ld]\n",
853
+ sc->main_hratio, sc->main_vratio);
849854
850855 gsc_set_h_coef(ctx, sc->main_hratio);
851856 cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio);
....@@ -911,7 +916,7 @@
911916 if (cfg & (mask << i))
912917 buf_num--;
913918
914
- DRM_DEBUG_KMS("buf_num[%d]\n", buf_num);
919
+ DRM_DEV_DEBUG_KMS(ctx->dev, "buf_num[%d]\n", buf_num);
915920
916921 return buf_num;
917922 }
....@@ -958,7 +963,7 @@
958963 u32 cfg, curr_index, i;
959964 u32 buf_id = GSC_MAX_SRC;
960965
961
- DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id);
966
+ DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id);
962967
963968 cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK);
964969 curr_index = GSC_IN_CURR_GET_INDEX(cfg);
....@@ -970,11 +975,11 @@
970975 }
971976 }
972977
973
- DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
974
- curr_index, buf_id);
978
+ DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
979
+ curr_index, buf_id);
975980
976981 if (buf_id == GSC_MAX_SRC) {
977
- DRM_ERROR("failed to get in buffer index.\n");
982
+ DRM_DEV_ERROR(ctx->dev, "failed to get in buffer index.\n");
978983 return -EINVAL;
979984 }
980985
....@@ -988,7 +993,7 @@
988993 u32 cfg, curr_index, i;
989994 u32 buf_id = GSC_MAX_DST;
990995
991
- DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id);
996
+ DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id);
992997
993998 cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK);
994999 curr_index = GSC_OUT_CURR_GET_INDEX(cfg);
....@@ -1001,14 +1006,14 @@
10011006 }
10021007
10031008 if (buf_id == GSC_MAX_DST) {
1004
- DRM_ERROR("failed to get out buffer index.\n");
1009
+ DRM_DEV_ERROR(ctx->dev, "failed to get out buffer index.\n");
10051010 return -EINVAL;
10061011 }
10071012
10081013 gsc_dst_set_buf_seq(ctx, buf_id, false);
10091014
1010
- DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
1011
- curr_index, buf_id);
1015
+ DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg,
1016
+ curr_index, buf_id);
10121017
10131018 return buf_id;
10141019 }
....@@ -1019,7 +1024,7 @@
10191024 u32 status;
10201025 int err = 0;
10211026
1022
- DRM_DEBUG_KMS("gsc id[%d]\n", ctx->id);
1027
+ DRM_DEV_DEBUG_KMS(ctx->dev, "gsc id[%d]\n", ctx->id);
10231028
10241029 status = gsc_read(GSC_IRQ);
10251030 if (status & GSC_IRQ_STATUS_OR_IRQ) {
....@@ -1037,8 +1042,8 @@
10371042 src_buf_id = gsc_get_src_buf_index(ctx);
10381043 dst_buf_id = gsc_get_dst_buf_index(ctx);
10391044
1040
- DRM_DEBUG_KMS("buf_id_src[%d]buf_id_dst[%d]\n", src_buf_id,
1041
- dst_buf_id);
1045
+ DRM_DEV_DEBUG_KMS(ctx->dev, "buf_id_src[%d]buf_id_dst[%d]\n",
1046
+ src_buf_id, dst_buf_id);
10421047
10431048 if (src_buf_id < 0 || dst_buf_id < 0)
10441049 err = -EINVAL;
....@@ -1122,11 +1127,11 @@
11221127 return ret;
11231128 }
11241129
1125
- gsc_src_set_fmt(ctx, task->src.buf.fourcc);
1130
+ gsc_src_set_fmt(ctx, task->src.buf.fourcc, task->src.buf.modifier);
11261131 gsc_src_set_transf(ctx, task->transform.rotation);
11271132 gsc_src_set_size(ctx, &task->src);
11281133 gsc_src_set_addr(ctx, 0, &task->src);
1129
- gsc_dst_set_fmt(ctx, task->dst.buf.fourcc);
1134
+ gsc_dst_set_fmt(ctx, task->dst.buf.fourcc, task->dst.buf.modifier);
11301135 gsc_dst_set_size(ctx, &task->dst);
11311136 gsc_dst_set_addr(ctx, 0, &task->dst);
11321137 gsc_set_prescaler(ctx, &ctx->sc, &task->src.rect, &task->dst.rect);
....@@ -1164,9 +1169,10 @@
11641169 struct exynos_drm_ipp *ipp = &ctx->ipp;
11651170
11661171 ctx->drm_dev = drm_dev;
1167
- drm_iommu_attach_device(drm_dev, dev);
1172
+ ctx->drm_dev = drm_dev;
1173
+ exynos_drm_register_dma(drm_dev, dev, &ctx->dma_priv);
11681174
1169
- exynos_drm_ipp_register(drm_dev, ipp, &ipp_funcs,
1175
+ exynos_drm_ipp_register(dev, ipp, &ipp_funcs,
11701176 DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE |
11711177 DRM_EXYNOS_IPP_CAP_SCALE | DRM_EXYNOS_IPP_CAP_CONVERT,
11721178 ctx->formats, ctx->num_formats, "gsc");
....@@ -1183,8 +1189,8 @@
11831189 struct drm_device *drm_dev = data;
11841190 struct exynos_drm_ipp *ipp = &ctx->ipp;
11851191
1186
- exynos_drm_ipp_unregister(drm_dev, ipp);
1187
- drm_iommu_detach_device(drm_dev, dev);
1192
+ exynos_drm_ipp_unregister(dev, ipp);
1193
+ exynos_drm_unregister_dma(drm_dev, dev, &ctx->dma_priv);
11881194 }
11891195
11901196 static const struct component_ops gsc_component_ops = {
....@@ -1200,6 +1206,10 @@
12001206 DRM_FORMAT_YUV420, DRM_FORMAT_YVU420, DRM_FORMAT_YUV422,
12011207 };
12021208
1209
+static const unsigned int gsc_tiled_formats[] = {
1210
+ DRM_FORMAT_NV12, DRM_FORMAT_NV21,
1211
+};
1212
+
12031213 static int gsc_probe(struct platform_device *pdev)
12041214 {
12051215 struct device *dev = &pdev->dev;
....@@ -1207,16 +1217,10 @@
12071217 struct exynos_drm_ipp_formats *formats;
12081218 struct gsc_context *ctx;
12091219 struct resource *res;
1210
- int ret, i;
1220
+ int num_formats, ret, i, j;
12111221
12121222 ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
12131223 if (!ctx)
1214
- return -ENOMEM;
1215
-
1216
- formats = devm_kcalloc(dev,
1217
- ARRAY_SIZE(gsc_formats), sizeof(*formats),
1218
- GFP_KERNEL);
1219
- if (!formats)
12201224 return -ENOMEM;
12211225
12221226 driver_data = (struct gsc_driverdata *)of_device_get_match_data(dev);
....@@ -1224,6 +1228,13 @@
12241228 ctx->num_clocks = driver_data->num_clocks;
12251229 ctx->clk_names = driver_data->clk_names;
12261230
1231
+ /* construct formats/limits array */
1232
+ num_formats = ARRAY_SIZE(gsc_formats) + ARRAY_SIZE(gsc_tiled_formats);
1233
+ formats = devm_kcalloc(dev, num_formats, sizeof(*formats), GFP_KERNEL);
1234
+ if (!formats)
1235
+ return -ENOMEM;
1236
+
1237
+ /* linear formats */
12271238 for (i = 0; i < ARRAY_SIZE(gsc_formats); i++) {
12281239 formats[i].fourcc = gsc_formats[i];
12291240 formats[i].type = DRM_EXYNOS_IPP_FORMAT_SOURCE |
....@@ -1231,8 +1242,19 @@
12311242 formats[i].limits = driver_data->limits;
12321243 formats[i].num_limits = driver_data->num_limits;
12331244 }
1245
+
1246
+ /* tiled formats */
1247
+ for (j = i, i = 0; i < ARRAY_SIZE(gsc_tiled_formats); j++, i++) {
1248
+ formats[j].fourcc = gsc_tiled_formats[i];
1249
+ formats[j].modifier = DRM_FORMAT_MOD_SAMSUNG_16_16_TILE;
1250
+ formats[j].type = DRM_EXYNOS_IPP_FORMAT_SOURCE |
1251
+ DRM_EXYNOS_IPP_FORMAT_DESTINATION;
1252
+ formats[j].limits = driver_data->limits;
1253
+ formats[j].num_limits = driver_data->num_limits;
1254
+ }
1255
+
12341256 ctx->formats = formats;
1235
- ctx->num_formats = ARRAY_SIZE(gsc_formats);
1257
+ ctx->num_formats = num_formats;
12361258
12371259 /* clock control */
12381260 for (i = 0; i < ctx->num_clocks; i++) {
....@@ -1304,7 +1326,7 @@
13041326 struct gsc_context *ctx = get_gsc_context(dev);
13051327 int i;
13061328
1307
- DRM_DEBUG_KMS("id[%d]\n", ctx->id);
1329
+ DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id);
13081330
13091331 for (i = ctx->num_clocks - 1; i >= 0; i--)
13101332 clk_disable_unprepare(ctx->clocks[i]);
....@@ -1317,7 +1339,7 @@
13171339 struct gsc_context *ctx = get_gsc_context(dev);
13181340 int i, ret;
13191341
1320
- DRM_DEBUG_KMS("id[%d]\n", ctx->id);
1342
+ DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id);
13211343
13221344 for (i = 0; i < ctx->num_clocks; i++) {
13231345 ret = clk_prepare_enable(ctx->clocks[i]);