add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/gpu/drm/amd/amdgpu/soc15.h
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@@ -26,9 +26,10 @@
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 #include "nbio_v6_1.h"
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 #include "nbio_v7_0.h"
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+#include "nbio_v7_4.h"
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-#define SOC15_FLUSH_GPU_TLB_NUM_WREG		4
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-#define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT	1
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+#define SOC15_FLUSH_GPU_TLB_NUM_WREG		6
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+#define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT	3
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 extern const struct amd_ip_funcs soc15_common_ip_funcs;
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@@ -41,13 +42,55 @@
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 	u32	or_mask;
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 };
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+struct soc15_reg_rlcg {
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+	u32	hwip;
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+	u32	instance;
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+	u32	segment;
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+	u32	reg;
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+};
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+
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+struct soc15_reg_entry {
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+	uint32_t hwip;
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+	uint32_t inst;
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+	uint32_t seg;
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+	uint32_t reg_offset;
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+	uint32_t reg_value;
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+	uint32_t se_num;
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+	uint32_t instance;
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+};
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+
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+struct soc15_allowed_register_entry {
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+	uint32_t hwip;
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+	uint32_t inst;
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+	uint32_t seg;
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+	uint32_t reg_offset;
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+	bool grbm_indexed;
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+};
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+
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+struct soc15_ras_field_entry {
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+	const char *name;
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+	uint32_t hwip;
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+	uint32_t inst;
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+	uint32_t seg;
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+	uint32_t reg_offset;
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+	uint32_t sec_count_mask;
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+	uint32_t sec_count_shift;
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+	uint32_t ded_count_mask;
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+	uint32_t ded_count_shift;
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+};
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+
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 #define SOC15_REG_ENTRY(ip, inst, reg)	ip##_HWIP, inst, reg##_BASE_IDX, reg
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+
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+#define SOC15_REG_ENTRY_OFFSET(entry)	(adev->reg_offset[entry.hwip][entry.inst][entry.seg] + entry.reg_offset)
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 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
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 	{ ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
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+#define SOC15_REG_FIELD(reg, field) reg##__##field##_MASK, reg##__##field##__SHIFT
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+
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 void soc15_grbm_select(struct amdgpu_device *adev,
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 		    u32 me, u32 pipe, u32 queue, u32 vmid);
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+void soc15_set_virt_ops(struct amdgpu_device *adev);
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 int soc15_set_ip_blocks(struct amdgpu_device *adev);
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 void soc15_program_register_sequence(struct amdgpu_device *adev,
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@@ -56,5 +99,8 @@
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 int vega10_reg_base_init(struct amdgpu_device *adev);
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 int vega20_reg_base_init(struct amdgpu_device *adev);
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+int arct_reg_base_init(struct amdgpu_device *adev);
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+void vega10_doorbell_index_init(struct amdgpu_device *adev);
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+void vega20_doorbell_index_init(struct amdgpu_device *adev);
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 #endif