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46 | 46 | #define GRPH_ENDIAN_8IN16 1 |
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47 | 47 | #define GRPH_ENDIAN_8IN32 2 |
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48 | 48 | #define GRPH_ENDIAN_8IN64 3 |
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| 49 | +#define GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) |
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| 50 | +#define GRPH_RED_SEL_R 0 |
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| 51 | +#define GRPH_RED_SEL_G 1 |
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| 52 | +#define GRPH_RED_SEL_B 2 |
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| 53 | +#define GRPH_RED_SEL_A 3 |
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| 54 | +#define GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) |
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| 55 | +#define GRPH_GREEN_SEL_G 0 |
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| 56 | +#define GRPH_GREEN_SEL_B 1 |
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| 57 | +#define GRPH_GREEN_SEL_A 2 |
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| 58 | +#define GRPH_GREEN_SEL_R 3 |
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| 59 | +#define GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) |
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| 60 | +#define GRPH_BLUE_SEL_B 0 |
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| 61 | +#define GRPH_BLUE_SEL_A 1 |
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| 62 | +#define GRPH_BLUE_SEL_R 2 |
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| 63 | +#define GRPH_BLUE_SEL_G 3 |
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| 64 | +#define GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) |
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| 65 | +#define GRPH_ALPHA_SEL_A 0 |
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| 66 | +#define GRPH_ALPHA_SEL_R 1 |
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| 67 | +#define GRPH_ALPHA_SEL_G 2 |
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| 68 | +#define GRPH_ALPHA_SEL_B 3 |
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49 | 69 | |
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50 | 70 | #define GRPH_DEPTH(x) (((x) & 0x3) << 0) |
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51 | 71 | #define GRPH_DEPTH_8BPP 0 |
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101 | 121 | #define CURSOR_UPDATE_LOCK (1 << 16) |
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102 | 122 | #define CURSOR_DISABLE_MULTIPLE_UPDATE (1 << 24) |
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103 | 123 | |
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104 | | -#define AMDGPU_NUM_OF_VMIDS 8 |
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105 | 124 | #define SI_CRTC0_REGISTER_OFFSET 0 |
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106 | 125 | #define SI_CRTC1_REGISTER_OFFSET 0x300 |
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107 | 126 | #define SI_CRTC2_REGISTER_OFFSET 0x2600 |
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