.. | .. |
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27 | 27 | #include <linux/hashtable.h> |
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28 | 28 | |
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29 | 29 | struct dma_fence; |
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30 | | -struct reservation_object; |
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| 30 | +struct dma_resv; |
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31 | 31 | struct amdgpu_device; |
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32 | 32 | struct amdgpu_ring; |
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| 33 | + |
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| 34 | +enum amdgpu_sync_mode { |
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| 35 | + AMDGPU_SYNC_ALWAYS, |
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| 36 | + AMDGPU_SYNC_NE_OWNER, |
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| 37 | + AMDGPU_SYNC_EQ_OWNER, |
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| 38 | + AMDGPU_SYNC_EXPLICIT |
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| 39 | +}; |
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33 | 40 | |
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34 | 41 | /* |
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35 | 42 | * Container for fences used to sync command submissions. |
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.. | .. |
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40 | 47 | }; |
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41 | 48 | |
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42 | 49 | void amdgpu_sync_create(struct amdgpu_sync *sync); |
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43 | | -int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync, |
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44 | | - struct dma_fence *f, bool explicit); |
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45 | | -int amdgpu_sync_resv(struct amdgpu_device *adev, |
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46 | | - struct amdgpu_sync *sync, |
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47 | | - struct reservation_object *resv, |
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48 | | - void *owner, |
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49 | | - bool explicit_sync); |
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| 50 | +int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f); |
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| 51 | +int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence); |
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| 52 | +int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, |
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| 53 | + struct dma_resv *resv, enum amdgpu_sync_mode mode, |
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| 54 | + void *owner); |
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50 | 55 | struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, |
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51 | 56 | struct amdgpu_ring *ring); |
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52 | | -struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, bool *explicit); |
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| 57 | +struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync); |
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53 | 58 | int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone); |
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54 | 59 | int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr); |
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55 | 60 | void amdgpu_sync_free(struct amdgpu_sync *sync); |
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