add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
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@@ -25,17 +25,36 @@
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 #define __AMDGPU_IRQ_H__
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 #include <linux/irqdomain.h>
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+#include "soc15_ih_clientid.h"
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 #include "amdgpu_ih.h"
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-#define AMDGPU_MAX_IRQ_SRC_ID	0x100
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+#define AMDGPU_MAX_IRQ_SRC_ID		0x100
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 #define AMDGPU_MAX_IRQ_CLIENT_ID	0x100
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+#define AMDGPU_IRQ_CLIENTID_LEGACY	0
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+#define AMDGPU_IRQ_CLIENTID_MAX		SOC15_IH_CLIENTID_MAX
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+
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+#define AMDGPU_IRQ_SRC_DATA_MAX_SIZE_DW	4
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+
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 struct amdgpu_device;
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-struct amdgpu_iv_entry;
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 enum amdgpu_interrupt_state {
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 	AMDGPU_IRQ_STATE_DISABLE,
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 	AMDGPU_IRQ_STATE_ENABLE,
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+};
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+
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+struct amdgpu_iv_entry {
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+	unsigned client_id;
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+	unsigned src_id;
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+	unsigned ring_id;
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+	unsigned vmid;
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+	unsigned vmid_src;
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+	uint64_t timestamp;
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+	unsigned timestamp_src;
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+	unsigned pasid;
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+	unsigned pasid_src;
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+	unsigned src_data[AMDGPU_IRQ_SRC_DATA_MAX_SIZE_DW];
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+	const uint32_t *iv_entry;
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 };
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 struct amdgpu_irq_src {
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@@ -63,14 +82,16 @@
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 	bool				installed;
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 	spinlock_t			lock;
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 	/* interrupt sources */
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-	struct amdgpu_irq_client	client[AMDGPU_IH_CLIENTID_MAX];
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+	struct amdgpu_irq_client	client[AMDGPU_IRQ_CLIENTID_MAX];
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 	/* status, etc. */
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 	bool				msi_enabled; /* msi enabled */
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-	/* interrupt ring */
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-	struct amdgpu_ih_ring		ih;
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-	const struct amdgpu_ih_funcs	*ih_funcs;
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+	/* interrupt rings */
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+	struct amdgpu_ih_ring		ih, ih1, ih2;
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+	const struct amdgpu_ih_funcs    *ih_funcs;
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+	struct work_struct		ih1_work, ih2_work;
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+	struct amdgpu_irq_src		self_irq;
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 	/* gen irq stuff */
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 	struct irq_domain		*domain; /* GPU irq controller domain */
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@@ -87,7 +108,7 @@
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 		      unsigned client_id, unsigned src_id,
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 		      struct amdgpu_irq_src *source);
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 void amdgpu_irq_dispatch(struct amdgpu_device *adev,
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-			 struct amdgpu_iv_entry *entry);
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+			 struct amdgpu_ih_ring *ih);
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 int amdgpu_irq_update(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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 		      unsigned type);
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 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,