add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
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@@ -24,7 +24,7 @@
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24
 
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 #include <linux/idr.h>
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 #include <linux/dma-fence-array.h>
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-#include <drm/drmP.h>
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+
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 #include "amdgpu.h"
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 #include "amdgpu_trace.h"
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@@ -43,7 +43,7 @@
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 /* Helper to free pasid from a fence callback */
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 struct amdgpu_pasid_cb {
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 	struct dma_fence_cb cb;
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-	unsigned int pasid;
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+	u32 pasid;
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 };
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 /**
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@@ -79,7 +79,7 @@
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  * amdgpu_pasid_free - Free a PASID
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  * @pasid: PASID to free
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  */
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-void amdgpu_pasid_free(unsigned int pasid)
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+void amdgpu_pasid_free(u32 pasid)
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 {
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 	trace_amdgpu_pasid_freed(pasid);
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 	ida_simple_remove(&amdgpu_pasid_ida, pasid);
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@@ -104,15 +104,15 @@
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  *
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  * Free the pasid only after all the fences in resv are signaled.
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  */
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-void amdgpu_pasid_free_delayed(struct reservation_object *resv,
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-			       unsigned int pasid)
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+void amdgpu_pasid_free_delayed(struct dma_resv *resv,
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+			       u32 pasid)
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 {
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 	struct dma_fence *fence, **fences;
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 	struct amdgpu_pasid_cb *cb;
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 	unsigned count;
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 	int r;
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-	r = reservation_object_get_fences_rcu(resv, NULL, &count, &fences);
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+	r = dma_resv_get_fences_rcu(resv, NULL, &count, &fences);
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 	if (r)
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 		goto fallback;
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@@ -156,7 +156,7 @@
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 	/* Not enough memory for the delayed delete, as last resort
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 	 * block for all the fences to complete.
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 	 */
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-	reservation_object_wait_timeout_rcu(resv, true, false,
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+	dma_resv_wait_timeout_rcu(resv, true, false,
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 					    MAX_SCHEDULE_TIMEOUT);
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 	amdgpu_pasid_free(pasid);
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 }
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@@ -206,7 +206,7 @@
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 	int r;
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 	if (ring->vmid_wait && !dma_fence_is_signaled(ring->vmid_wait))
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-		return amdgpu_sync_fence(adev, sync, ring->vmid_wait, false);
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+		return amdgpu_sync_fence(sync, ring->vmid_wait);
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210
 
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 	fences = kmalloc_array(sizeof(void *), id_mgr->num_ids, GFP_KERNEL);
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 	if (!fences)
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@@ -215,7 +215,11 @@
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 	/* Check if we have an idle VMID */
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 	i = 0;
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 	list_for_each_entry((*idle), &id_mgr->ids_lru, list) {
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-		fences[i] = amdgpu_sync_peek_fence(&(*idle)->active, ring);
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+		/* Don't use per engine and per process VMID at the same time */
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+		struct amdgpu_ring *r = adev->vm_manager.concurrent_flush ?
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+			NULL : ring;
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+
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+		fences[i] = amdgpu_sync_peek_fence(&(*idle)->active, r);
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 		if (!fences[i])
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 			break;
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 		++i;
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@@ -241,7 +245,7 @@
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 			return -ENOMEM;
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 		}
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-		r = amdgpu_sync_fence(adev, sync, &array->base, false);
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+		r = amdgpu_sync_fence(sync, &array->base);
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 		dma_fence_put(ring->vmid_wait);
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 		ring->vmid_wait = &array->base;
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 		return r;
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@@ -280,21 +284,25 @@
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 	if (updates && (*id)->flushed_updates &&
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 	    updates->context == (*id)->flushed_updates->context &&
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 	    !dma_fence_is_later(updates, (*id)->flushed_updates))
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-	    updates = NULL;
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+		updates = NULL;
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288
 
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-	if ((*id)->owner != vm->entity.fence_context ||
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+	if ((*id)->owner != vm->immediate.fence_context ||
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 	    job->vm_pd_addr != (*id)->pd_gpu_addr ||
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 	    updates || !(*id)->last_flush ||
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 	    ((*id)->last_flush->context != fence_context &&
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 	     !dma_fence_is_signaled((*id)->last_flush))) {
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 		struct dma_fence *tmp;
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295
 
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+		/* Don't use per engine and per process VMID at the same time */
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+		if (adev->vm_manager.concurrent_flush)
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+			ring = NULL;
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+
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 		/* to prevent one context starved by another context */
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 		(*id)->pd_gpu_addr = 0;
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 		tmp = amdgpu_sync_peek_fence(&(*id)->active, ring);
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 		if (tmp) {
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 			*id = NULL;
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-			r = amdgpu_sync_fence(adev, sync, tmp, false);
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+			r = amdgpu_sync_fence(sync, tmp);
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 			return r;
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 		}
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 		needs_flush = true;
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@@ -303,7 +311,7 @@
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 	/* Good we can use this VMID. Remember this submission as
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 	* user of the VMID.
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 	*/
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-	r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false);
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+	r = amdgpu_sync_fence(&(*id)->active, fence);
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 	if (r)
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 		return r;
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317
 
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@@ -349,7 +357,7 @@
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 		struct dma_fence *flushed;
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358
 
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 		/* Check all the prerequisites to using this VMID */
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-		if ((*id)->owner != vm->entity.fence_context)
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+		if ((*id)->owner != vm->immediate.fence_context)
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 			continue;
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 		if ((*id)->pd_gpu_addr != job->vm_pd_addr)
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@@ -364,14 +372,13 @@
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 		if (updates && (!flushed || dma_fence_is_later(updates, flushed)))
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 			needs_flush = true;
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374
 
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-		/* Concurrent flushes are only possible starting with Vega10 */
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-		if (adev->asic_type < CHIP_VEGA10 && needs_flush)
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+		if (needs_flush && !adev->vm_manager.concurrent_flush)
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 			continue;
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 		/* Good, we can use this VMID. Remember this submission as
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 		 * user of the VMID.
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 		 */
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-		r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false);
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+		r = amdgpu_sync_fence(&(*id)->active, fence);
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 		if (r)
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 			return r;
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@@ -431,8 +438,7 @@
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 			id = idle;
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 			/* Remember this submission as user of the VMID */
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-			r = amdgpu_sync_fence(ring->adev, &id->active,
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-					      fence, false);
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+			r = amdgpu_sync_fence(&id->active, fence);
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 			if (r)
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 				goto error;
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@@ -445,7 +451,7 @@
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 	}
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 	id->pd_gpu_addr = job->vm_pd_addr;
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-	id->owner = vm->entity.fence_context;
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+	id->owner = vm->immediate.fence_context;
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 	if (job->vm_needs_flush) {
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 		dma_fence_put(id->last_flush);
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@@ -571,6 +577,9 @@
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 		INIT_LIST_HEAD(&id_mgr->ids_lru);
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 		atomic_set(&id_mgr->reserved_vmid_num, 0);
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579
 
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+		/* manage only VMIDs not used by KFD */
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+		id_mgr->num_ids = adev->vm_manager.first_kfd_vmid;
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+
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 		/* skip over VMID 0, since it is the system VM */
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 		for (j = 1; j < id_mgr->num_ids; ++j) {
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 			amdgpu_vmid_reset(adev, i, j);