.. | .. |
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23 | 23 | * Authors: |
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24 | 24 | * David Airlie |
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25 | 25 | */ |
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26 | | -#include <linux/module.h> |
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27 | | -#include <linux/slab.h> |
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28 | | -#include <linux/pm_runtime.h> |
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29 | 26 | |
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30 | | -#include <drm/drmP.h> |
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| 27 | +#include <linux/module.h> |
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| 28 | +#include <linux/pm_runtime.h> |
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| 29 | +#include <linux/slab.h> |
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| 30 | +#include <linux/vga_switcheroo.h> |
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| 31 | + |
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| 32 | +#include <drm/amdgpu_drm.h> |
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31 | 33 | #include <drm/drm_crtc.h> |
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32 | 34 | #include <drm/drm_crtc_helper.h> |
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33 | | -#include <drm/amdgpu_drm.h> |
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| 35 | +#include <drm/drm_fb_helper.h> |
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| 36 | +#include <drm/drm_fourcc.h> |
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| 37 | + |
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34 | 38 | #include "amdgpu.h" |
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35 | 39 | #include "cikd.h" |
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36 | | - |
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37 | | -#include <drm/drm_fb_helper.h> |
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38 | | - |
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39 | | -#include <linux/vga_switcheroo.h> |
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| 40 | +#include "amdgpu_gem.h" |
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40 | 41 | |
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41 | 42 | #include "amdgpu_display.h" |
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42 | 43 | |
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.. | .. |
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48 | 49 | static int |
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49 | 50 | amdgpufb_open(struct fb_info *info, int user) |
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50 | 51 | { |
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51 | | - struct amdgpu_fbdev *rfbdev = info->par; |
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52 | | - struct amdgpu_device *adev = rfbdev->adev; |
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53 | | - int ret = pm_runtime_get_sync(adev->ddev->dev); |
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| 52 | + struct drm_fb_helper *fb_helper = info->par; |
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| 53 | + int ret = pm_runtime_get_sync(fb_helper->dev->dev); |
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54 | 54 | if (ret < 0 && ret != -EACCES) { |
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55 | | - pm_runtime_mark_last_busy(adev->ddev->dev); |
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56 | | - pm_runtime_put_autosuspend(adev->ddev->dev); |
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| 55 | + pm_runtime_mark_last_busy(fb_helper->dev->dev); |
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| 56 | + pm_runtime_put_autosuspend(fb_helper->dev->dev); |
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57 | 57 | return ret; |
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58 | 58 | } |
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59 | 59 | return 0; |
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.. | .. |
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62 | 62 | static int |
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63 | 63 | amdgpufb_release(struct fb_info *info, int user) |
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64 | 64 | { |
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65 | | - struct amdgpu_fbdev *rfbdev = info->par; |
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66 | | - struct amdgpu_device *adev = rfbdev->adev; |
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| 65 | + struct drm_fb_helper *fb_helper = info->par; |
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67 | 66 | |
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68 | | - pm_runtime_mark_last_busy(adev->ddev->dev); |
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69 | | - pm_runtime_put_autosuspend(adev->ddev->dev); |
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| 67 | + pm_runtime_mark_last_busy(fb_helper->dev->dev); |
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| 68 | + pm_runtime_put_autosuspend(fb_helper->dev->dev); |
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70 | 69 | return 0; |
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71 | 70 | } |
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72 | 71 | |
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73 | | -static struct fb_ops amdgpufb_ops = { |
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| 72 | +static const struct fb_ops amdgpufb_ops = { |
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74 | 73 | .owner = THIS_MODULE, |
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75 | 74 | DRM_FB_HELPER_DEFAULT_OPS, |
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76 | 75 | .fb_open = amdgpufb_open, |
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.. | .. |
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115 | 114 | amdgpu_bo_unpin(abo); |
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116 | 115 | amdgpu_bo_unreserve(abo); |
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117 | 116 | } |
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118 | | - drm_gem_object_put_unlocked(gobj); |
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| 117 | + drm_gem_object_put(gobj); |
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119 | 118 | } |
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120 | 119 | |
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121 | 120 | static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev, |
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122 | 121 | struct drm_mode_fb_cmd2 *mode_cmd, |
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123 | 122 | struct drm_gem_object **gobj_p) |
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124 | 123 | { |
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| 124 | + const struct drm_format_info *info; |
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125 | 125 | struct amdgpu_device *adev = rfbdev->adev; |
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126 | 126 | struct drm_gem_object *gobj = NULL; |
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127 | 127 | struct amdgpu_bo *abo = NULL; |
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.. | .. |
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131 | 131 | int aligned_size, size; |
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132 | 132 | int height = mode_cmd->height; |
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133 | 133 | u32 cpp; |
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| 134 | + u64 flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | |
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| 135 | + AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS | |
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| 136 | + AMDGPU_GEM_CREATE_VRAM_CLEARED; |
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134 | 137 | |
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135 | | - cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0); |
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| 138 | + info = drm_get_format_info(adev_to_drm(adev), mode_cmd); |
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| 139 | + cpp = info->cpp[0]; |
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136 | 140 | |
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137 | 141 | /* need to align pitch with crtc limits */ |
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138 | 142 | mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, |
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139 | 143 | fb_tiled); |
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140 | | - domain = amdgpu_display_supported_domains(adev); |
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141 | | - |
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| 144 | + domain = amdgpu_display_supported_domains(adev, flags); |
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142 | 145 | height = ALIGN(mode_cmd->height, 8); |
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143 | 146 | size = mode_cmd->pitches[0] * height; |
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144 | 147 | aligned_size = ALIGN(size, PAGE_SIZE); |
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145 | | - ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, |
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146 | | - AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | |
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147 | | - AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS | |
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148 | | - AMDGPU_GEM_CREATE_VRAM_CLEARED, |
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149 | | - ttm_bo_type_kernel, NULL, &gobj); |
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| 148 | + ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, flags, |
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| 149 | + ttm_bo_type_device, NULL, &gobj); |
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150 | 150 | if (ret) { |
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151 | 151 | pr_err("failed to allocate framebuffer (%d)\n", aligned_size); |
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152 | 152 | return -ENOMEM; |
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.. | .. |
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166 | 166 | if (ret) |
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167 | 167 | dev_err(adev->dev, "FB failed to set tiling flags\n"); |
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168 | 168 | } |
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169 | | - |
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170 | 169 | |
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171 | 170 | ret = amdgpu_bo_pin(abo, domain); |
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172 | 171 | if (ret) { |
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.. | .. |
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232 | 231 | goto out; |
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233 | 232 | } |
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234 | 233 | |
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235 | | - info->par = rfbdev; |
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236 | | - info->skip_vt_switch = true; |
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237 | | - |
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238 | | - ret = amdgpu_display_framebuffer_init(adev->ddev, &rfbdev->rfb, |
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| 234 | + ret = amdgpu_display_framebuffer_init(adev_to_drm(adev), &rfbdev->rfb, |
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239 | 235 | &mode_cmd, gobj); |
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240 | 236 | if (ret) { |
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241 | 237 | DRM_ERROR("failed to initialize framebuffer %d\n", ret); |
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.. | .. |
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247 | 243 | /* setup helper */ |
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248 | 244 | rfbdev->helper.fb = fb; |
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249 | 245 | |
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250 | | - strcpy(info->fix.id, "amdgpudrmfb"); |
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251 | | - |
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252 | | - drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth); |
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253 | | - |
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254 | 246 | info->fbops = &amdgpufb_ops; |
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255 | 247 | |
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256 | 248 | tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start; |
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.. | .. |
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259 | 251 | info->screen_base = amdgpu_bo_kptr(abo); |
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260 | 252 | info->screen_size = amdgpu_bo_size(abo); |
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261 | 253 | |
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262 | | - drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); |
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| 254 | + drm_fb_helper_fill_info(info, &rfbdev->helper, sizes); |
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263 | 255 | |
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264 | 256 | /* setup aperture base/size for vesafb takeover */ |
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265 | | - info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; |
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| 257 | + info->apertures->ranges[0].base = adev_to_drm(adev)->mode_config.fb_base; |
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266 | 258 | info->apertures->ranges[0].size = adev->gmc.aper_size; |
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267 | 259 | |
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268 | 260 | /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ |
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.. | .. |
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278 | 270 | DRM_INFO("fb depth is %d\n", fb->format->depth); |
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279 | 271 | DRM_INFO(" pitch is %d\n", fb->pitches[0]); |
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280 | 272 | |
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281 | | - vga_switcheroo_client_fb_set(adev->ddev->pdev, info); |
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| 273 | + vga_switcheroo_client_fb_set(adev_to_drm(adev)->pdev, info); |
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282 | 274 | return 0; |
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283 | 275 | |
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284 | 276 | out: |
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.. | .. |
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286 | 278 | |
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287 | 279 | } |
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288 | 280 | if (fb && ret) { |
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289 | | - drm_gem_object_put_unlocked(gobj); |
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| 281 | + drm_gem_object_put(gobj); |
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290 | 282 | drm_framebuffer_unregister_private(fb); |
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291 | 283 | drm_framebuffer_cleanup(fb); |
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292 | 284 | kfree(fb); |
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.. | .. |
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329 | 321 | return 0; |
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330 | 322 | |
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331 | 323 | /* don't init fbdev if there are no connectors */ |
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332 | | - if (list_empty(&adev->ddev->mode_config.connector_list)) |
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| 324 | + if (list_empty(&adev_to_drm(adev)->mode_config.connector_list)) |
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333 | 325 | return 0; |
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334 | 326 | |
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335 | 327 | /* select 8 bpp console on low vram cards */ |
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.. | .. |
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343 | 335 | rfbdev->adev = adev; |
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344 | 336 | adev->mode_info.rfbdev = rfbdev; |
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345 | 337 | |
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346 | | - drm_fb_helper_prepare(adev->ddev, &rfbdev->helper, |
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347 | | - &amdgpu_fb_helper_funcs); |
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| 338 | + drm_fb_helper_prepare(adev_to_drm(adev), &rfbdev->helper, |
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| 339 | + &amdgpu_fb_helper_funcs); |
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348 | 340 | |
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349 | | - ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper, |
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350 | | - AMDGPUFB_CONN_LIMIT); |
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| 341 | + ret = drm_fb_helper_init(adev_to_drm(adev), &rfbdev->helper); |
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351 | 342 | if (ret) { |
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352 | 343 | kfree(rfbdev); |
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353 | 344 | return ret; |
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354 | 345 | } |
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355 | 346 | |
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356 | | - drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
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357 | | - |
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358 | 347 | /* disable all the possible outputs/crtcs before entering KMS mode */ |
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359 | 348 | if (!amdgpu_device_has_dc_support(adev)) |
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360 | | - drm_helper_disable_unused_functions(adev->ddev); |
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| 349 | + drm_helper_disable_unused_functions(adev_to_drm(adev)); |
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361 | 350 | |
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362 | 351 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
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363 | 352 | return 0; |
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.. | .. |
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368 | 357 | if (!adev->mode_info.rfbdev) |
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369 | 358 | return; |
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370 | 359 | |
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371 | | - amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev); |
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| 360 | + amdgpu_fbdev_destroy(adev_to_drm(adev), adev->mode_info.rfbdev); |
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372 | 361 | kfree(adev->mode_info.rfbdev); |
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373 | 362 | adev->mode_info.rfbdev = NULL; |
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374 | 363 | } |
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