add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
..
..
@@ -23,12 +23,13 @@
23
23
  * Authors: Dave Airlie
24
24
  *          Alex Deucher
25
25
  */
26
-#include <drm/drmP.h>
26
+
27
27
 #include <drm/amdgpu_drm.h>
28
28
 #include "amdgpu.h"
29
29
 #include "amdgpu_atombios.h"
30
30
 #include "amdgpu_atomfirmware.h"
31
31
 #include "amdgpu_i2c.h"
32
+#include "amdgpu_display.h"
32
33
 
33
34
 #include "atom.h"
34
35
 #include "atom-bits.h"
..
..
@@ -147,7 +148,7 @@
147
148
 
148
149
 			if (i2c.valid) {
149
150
 				sprintf(stmp, "0x%x", i2c.i2c_id);
150
-				adev->i2c_bus[i] = amdgpu_i2c_create(adev->ddev, &i2c, stmp);
151
+				adev->i2c_bus[i] = amdgpu_i2c_create(adev_to_drm(adev), &i2c, stmp);
151
152
 			}
152
153
 			gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
153
154
 				((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
..
..
@@ -540,7 +541,7 @@
540
541
 		}
541
542
 	}
542
543
 
543
-	amdgpu_link_encoder_connector(adev->ddev);
544
+	amdgpu_link_encoder_connector(adev_to_drm(adev));
544
545
 
545
546
 	return true;
546
547
 }
..
..
@@ -1785,9 +1786,9 @@
1785
1786
 			(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
1786
1787
 			ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
1787
1788
 			/* Firmware request VRAM reservation for SR-IOV */
1788
-			adev->fw_vram_usage.start_offset = (start_addr &
1789
+			adev->mman.fw_vram_usage_start_offset = (start_addr &
1789
1790
 				(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
1790
-			adev->fw_vram_usage.size = size << 10;
1791
+			adev->mman.fw_vram_usage_size = size << 10;
1791
1792
 			/* Use the default scratch size */
1792
1793
 			usage_bytes = 0;
1793
1794
 		} else {
..
..
@@ -1881,7 +1882,7 @@
1881
1882
  */
1882
1883
 static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)
1883
1884
 {
1884
-	struct amdgpu_device *adev = info->dev->dev_private;
1885
+	struct amdgpu_device *adev = drm_to_adev(info->dev);
1885
1886
 
1886
1887
 	WREG32(reg, val);
1887
1888
 }
..
..
@@ -1897,7 +1898,7 @@
1897
1898
  */
1898
1899
 static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
1899
1900
 {
1900
-	struct amdgpu_device *adev = info->dev->dev_private;
1901
+	struct amdgpu_device *adev = drm_to_adev(info->dev);
1901
1902
 	uint32_t r;
1902
1903
 
1903
1904
 	r = RREG32(reg);
..
..
@@ -1915,7 +1916,7 @@
1915
1916
  */
1916
1917
 static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)
1917
1918
 {
1918
-	struct amdgpu_device *adev = info->dev->dev_private;
1919
+	struct amdgpu_device *adev = drm_to_adev(info->dev);
1919
1920
 
1920
1921
 	WREG32_IO(reg, val);
1921
1922
 }
..
..
@@ -1931,7 +1932,7 @@
1931
1932
  */
1932
1933
 static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
1933
1934
 {
1934
-	struct amdgpu_device *adev = info->dev->dev_private;
1935
+	struct amdgpu_device *adev = drm_to_adev(info->dev);
1935
1936
 	uint32_t r;
1936
1937
 
1937
1938
 	r = RREG32_IO(reg);
..
..
@@ -1943,7 +1944,7 @@
1943
1944
 						 char *buf)
1944
1945
 {
1945
1946
 	struct drm_device *ddev = dev_get_drvdata(dev);
1946
-	struct amdgpu_device *adev = ddev->dev_private;
1947
+	struct amdgpu_device *adev = drm_to_adev(ddev);
1947
1948
 	struct atom_context *ctx = adev->mode_info.atom_context;
1948
1949
 
1949
1950
 	return snprintf(buf, PAGE_SIZE, "%s\n", ctx->vbios_version);
..
..
@@ -1994,7 +1995,7 @@
1994
1995
 		return -ENOMEM;
1995
1996
 
1996
1997
 	adev->mode_info.atom_card_info = atom_card_info;
1997
-	atom_card_info->dev = adev->ddev;
1998
+	atom_card_info->dev = adev_to_drm(adev);
1998
1999
 	atom_card_info->reg_read = cail_reg_read;
1999
2000
 	atom_card_info->reg_write = cail_reg_write;
2000
2001
 	/* needed for iio ops */
..
..
@@ -2035,3 +2036,20 @@
2035
2036
 	return 0;
2036
2037
 }
2037
2038
 
2039
+int amdgpu_atombios_get_data_table(struct amdgpu_device *adev,
2040
+				   uint32_t table,
2041
+				   uint16_t *size,
2042
+				   uint8_t *frev,
2043
+				   uint8_t *crev,
2044
+				   uint8_t **addr)
2045
+{
2046
+	uint16_t data_start;
2047
+
2048
+	if (!amdgpu_atom_parse_data_header(adev->mode_info.atom_context, table,
2049
+					   size, frev, crev, &data_start))
2050
+		return -EINVAL;
2051
+
2052
+	*addr = (uint8_t *)adev->mode_info.atom_context->bios + data_start;
2053
+
2054
+	return 0;
2055
+}