.. | .. |
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15 | 15 | #include <linux/module.h> |
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16 | 16 | #include <linux/pci.h> |
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17 | 17 | #include <linux/spinlock.h> |
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| 18 | +#include <asm-generic/msi.h> |
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18 | 19 | |
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19 | 20 | |
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20 | 21 | #define GPIO_RX_DAT 0x0 |
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.. | .. |
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53 | 54 | struct thunderx_gpio { |
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54 | 55 | struct gpio_chip chip; |
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55 | 56 | u8 __iomem *register_base; |
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56 | | - struct irq_domain *irqd; |
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57 | 57 | struct msix_entry *msix_entries; /* per line MSI-X */ |
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58 | 58 | struct thunderx_line *line_entries; /* per line irq info */ |
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59 | 59 | raw_spinlock_t lock; |
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.. | .. |
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170 | 170 | |
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171 | 171 | bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line)); |
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172 | 172 | |
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173 | | - return !(bit_cfg & GPIO_BIT_CFG_TX_OE); |
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| 173 | + if (bit_cfg & GPIO_BIT_CFG_TX_OE) |
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| 174 | + return GPIO_LINE_DIRECTION_OUT; |
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| 175 | + |
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| 176 | + return GPIO_LINE_DIRECTION_IN; |
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174 | 177 | } |
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175 | 178 | |
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176 | 179 | static int thunderx_gpio_set_config(struct gpio_chip *chip, |
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.. | .. |
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283 | 286 | } |
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284 | 287 | } |
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285 | 288 | |
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286 | | -static void thunderx_gpio_irq_ack(struct irq_data *data) |
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| 289 | +static void thunderx_gpio_irq_ack(struct irq_data *d) |
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287 | 290 | { |
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288 | | - struct thunderx_line *txline = irq_data_get_irq_chip_data(data); |
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| 291 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 292 | + struct thunderx_gpio *txgpio = gpiochip_get_data(gc); |
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289 | 293 | |
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290 | 294 | writeq(GPIO_INTR_INTR, |
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291 | | - txline->txgpio->register_base + intr_reg(txline->line)); |
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| 295 | + txgpio->register_base + intr_reg(irqd_to_hwirq(d))); |
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292 | 296 | } |
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293 | 297 | |
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294 | | -static void thunderx_gpio_irq_mask(struct irq_data *data) |
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| 298 | +static void thunderx_gpio_irq_mask(struct irq_data *d) |
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295 | 299 | { |
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296 | | - struct thunderx_line *txline = irq_data_get_irq_chip_data(data); |
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| 300 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 301 | + struct thunderx_gpio *txgpio = gpiochip_get_data(gc); |
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297 | 302 | |
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298 | 303 | writeq(GPIO_INTR_ENA_W1C, |
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299 | | - txline->txgpio->register_base + intr_reg(txline->line)); |
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| 304 | + txgpio->register_base + intr_reg(irqd_to_hwirq(d))); |
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300 | 305 | } |
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301 | 306 | |
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302 | | -static void thunderx_gpio_irq_mask_ack(struct irq_data *data) |
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| 307 | +static void thunderx_gpio_irq_mask_ack(struct irq_data *d) |
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303 | 308 | { |
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304 | | - struct thunderx_line *txline = irq_data_get_irq_chip_data(data); |
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| 309 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 310 | + struct thunderx_gpio *txgpio = gpiochip_get_data(gc); |
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305 | 311 | |
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306 | 312 | writeq(GPIO_INTR_ENA_W1C | GPIO_INTR_INTR, |
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307 | | - txline->txgpio->register_base + intr_reg(txline->line)); |
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| 313 | + txgpio->register_base + intr_reg(irqd_to_hwirq(d))); |
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308 | 314 | } |
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309 | 315 | |
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310 | | -static void thunderx_gpio_irq_unmask(struct irq_data *data) |
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| 316 | +static void thunderx_gpio_irq_unmask(struct irq_data *d) |
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311 | 317 | { |
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312 | | - struct thunderx_line *txline = irq_data_get_irq_chip_data(data); |
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| 318 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 319 | + struct thunderx_gpio *txgpio = gpiochip_get_data(gc); |
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313 | 320 | |
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314 | 321 | writeq(GPIO_INTR_ENA_W1S, |
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315 | | - txline->txgpio->register_base + intr_reg(txline->line)); |
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| 322 | + txgpio->register_base + intr_reg(irqd_to_hwirq(d))); |
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316 | 323 | } |
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317 | 324 | |
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318 | | -static int thunderx_gpio_irq_set_type(struct irq_data *data, |
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| 325 | +static int thunderx_gpio_irq_set_type(struct irq_data *d, |
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319 | 326 | unsigned int flow_type) |
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320 | 327 | { |
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321 | | - struct thunderx_line *txline = irq_data_get_irq_chip_data(data); |
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322 | | - struct thunderx_gpio *txgpio = txline->txgpio; |
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| 328 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 329 | + struct thunderx_gpio *txgpio = gpiochip_get_data(gc); |
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| 330 | + struct thunderx_line *txline = |
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| 331 | + &txgpio->line_entries[irqd_to_hwirq(d)]; |
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323 | 332 | u64 bit_cfg; |
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324 | 333 | |
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325 | | - irqd_set_trigger_type(data, flow_type); |
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| 334 | + irqd_set_trigger_type(d, flow_type); |
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326 | 335 | |
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327 | 336 | bit_cfg = txline->fil_bits | GPIO_BIT_CFG_INT_EN; |
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328 | 337 | |
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329 | 338 | if (flow_type & IRQ_TYPE_EDGE_BOTH) { |
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330 | | - irq_set_handler_locked(data, handle_fasteoi_ack_irq); |
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| 339 | + irq_set_handler_locked(d, handle_fasteoi_ack_irq); |
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331 | 340 | bit_cfg |= GPIO_BIT_CFG_INT_TYPE; |
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332 | 341 | } else { |
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333 | | - irq_set_handler_locked(data, handle_fasteoi_mask_irq); |
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| 342 | + irq_set_handler_locked(d, handle_fasteoi_mask_irq); |
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334 | 343 | } |
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335 | 344 | |
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336 | 345 | raw_spin_lock(&txgpio->lock); |
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.. | .. |
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359 | 368 | irq_chip_disable_parent(data); |
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360 | 369 | } |
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361 | 370 | |
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362 | | -static int thunderx_gpio_irq_request_resources(struct irq_data *data) |
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363 | | -{ |
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364 | | - struct thunderx_line *txline = irq_data_get_irq_chip_data(data); |
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365 | | - struct thunderx_gpio *txgpio = txline->txgpio; |
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366 | | - struct irq_data *parent_data = data->parent_data; |
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367 | | - int r; |
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368 | | - |
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369 | | - r = gpiochip_lock_as_irq(&txgpio->chip, txline->line); |
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370 | | - if (r) |
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371 | | - return r; |
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372 | | - |
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373 | | - if (parent_data && parent_data->chip->irq_request_resources) { |
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374 | | - r = parent_data->chip->irq_request_resources(parent_data); |
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375 | | - if (r) |
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376 | | - goto error; |
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377 | | - } |
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378 | | - |
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379 | | - return 0; |
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380 | | -error: |
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381 | | - gpiochip_unlock_as_irq(&txgpio->chip, txline->line); |
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382 | | - return r; |
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383 | | -} |
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384 | | - |
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385 | | -static void thunderx_gpio_irq_release_resources(struct irq_data *data) |
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386 | | -{ |
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387 | | - struct thunderx_line *txline = irq_data_get_irq_chip_data(data); |
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388 | | - struct thunderx_gpio *txgpio = txline->txgpio; |
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389 | | - struct irq_data *parent_data = data->parent_data; |
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390 | | - |
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391 | | - if (parent_data && parent_data->chip->irq_release_resources) |
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392 | | - parent_data->chip->irq_release_resources(parent_data); |
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393 | | - |
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394 | | - gpiochip_unlock_as_irq(&txgpio->chip, txline->line); |
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395 | | -} |
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396 | | - |
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397 | 371 | /* |
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398 | 372 | * Interrupts are chained from underlying MSI-X vectors. We have |
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399 | 373 | * these irq_chip functions to be able to handle level triggering |
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.. | .. |
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410 | 384 | .irq_unmask = thunderx_gpio_irq_unmask, |
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411 | 385 | .irq_eoi = irq_chip_eoi_parent, |
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412 | 386 | .irq_set_affinity = irq_chip_set_affinity_parent, |
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413 | | - .irq_request_resources = thunderx_gpio_irq_request_resources, |
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414 | | - .irq_release_resources = thunderx_gpio_irq_release_resources, |
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415 | 387 | .irq_set_type = thunderx_gpio_irq_set_type, |
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416 | 388 | |
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417 | 389 | .flags = IRQCHIP_SET_TYPE_MASKED |
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418 | 390 | }; |
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419 | 391 | |
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420 | | -static int thunderx_gpio_irq_translate(struct irq_domain *d, |
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421 | | - struct irq_fwspec *fwspec, |
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422 | | - irq_hw_number_t *hwirq, |
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423 | | - unsigned int *type) |
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| 392 | +static int thunderx_gpio_child_to_parent_hwirq(struct gpio_chip *gc, |
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| 393 | + unsigned int child, |
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| 394 | + unsigned int child_type, |
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| 395 | + unsigned int *parent, |
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| 396 | + unsigned int *parent_type) |
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424 | 397 | { |
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425 | | - struct thunderx_gpio *txgpio = d->host_data; |
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| 398 | + struct thunderx_gpio *txgpio = gpiochip_get_data(gc); |
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| 399 | + struct irq_data *irqd; |
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| 400 | + unsigned int irq; |
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426 | 401 | |
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427 | | - if (WARN_ON(fwspec->param_count < 2)) |
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| 402 | + irq = txgpio->msix_entries[child].vector; |
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| 403 | + irqd = irq_domain_get_irq_data(gc->irq.parent_domain, irq); |
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| 404 | + if (!irqd) |
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428 | 405 | return -EINVAL; |
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429 | | - if (fwspec->param[0] >= txgpio->chip.ngpio) |
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430 | | - return -EINVAL; |
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431 | | - *hwirq = fwspec->param[0]; |
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432 | | - *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; |
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| 406 | + *parent = irqd_to_hwirq(irqd); |
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| 407 | + *parent_type = IRQ_TYPE_LEVEL_HIGH; |
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433 | 408 | return 0; |
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434 | 409 | } |
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435 | 410 | |
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436 | | -static int thunderx_gpio_irq_alloc(struct irq_domain *d, unsigned int virq, |
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437 | | - unsigned int nr_irqs, void *arg) |
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| 411 | +static void *thunderx_gpio_populate_parent_alloc_info(struct gpio_chip *chip, |
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| 412 | + unsigned int parent_hwirq, |
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| 413 | + unsigned int parent_type) |
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438 | 414 | { |
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439 | | - struct thunderx_line *txline = arg; |
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| 415 | + msi_alloc_info_t *info; |
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440 | 416 | |
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441 | | - return irq_domain_set_hwirq_and_chip(d, virq, txline->line, |
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442 | | - &thunderx_gpio_irq_chip, txline); |
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443 | | -} |
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| 417 | + info = kmalloc(sizeof(*info), GFP_KERNEL); |
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| 418 | + if (!info) |
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| 419 | + return NULL; |
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444 | 420 | |
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445 | | -static const struct irq_domain_ops thunderx_gpio_irqd_ops = { |
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446 | | - .alloc = thunderx_gpio_irq_alloc, |
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447 | | - .translate = thunderx_gpio_irq_translate |
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448 | | -}; |
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449 | | - |
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450 | | -static int thunderx_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) |
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451 | | -{ |
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452 | | - struct thunderx_gpio *txgpio = gpiochip_get_data(chip); |
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453 | | - |
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454 | | - return irq_find_mapping(txgpio->irqd, offset); |
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| 421 | + info->hwirq = parent_hwirq; |
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| 422 | + return info; |
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455 | 423 | } |
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456 | 424 | |
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457 | 425 | static int thunderx_gpio_probe(struct pci_dev *pdev, |
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.. | .. |
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461 | 429 | struct device *dev = &pdev->dev; |
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462 | 430 | struct thunderx_gpio *txgpio; |
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463 | 431 | struct gpio_chip *chip; |
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| 432 | + struct gpio_irq_chip *girq; |
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464 | 433 | int ngpio, i; |
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465 | 434 | int err = 0; |
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466 | 435 | |
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.. | .. |
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505 | 474 | } |
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506 | 475 | |
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507 | 476 | txgpio->msix_entries = devm_kcalloc(dev, |
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508 | | - ngpio, sizeof(struct msix_entry), |
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509 | | - GFP_KERNEL); |
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| 477 | + ngpio, sizeof(struct msix_entry), |
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| 478 | + GFP_KERNEL); |
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510 | 479 | if (!txgpio->msix_entries) { |
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511 | 480 | err = -ENOMEM; |
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512 | 481 | goto out; |
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.. | .. |
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547 | 516 | if (err < 0) |
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548 | 517 | goto out; |
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549 | 518 | |
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550 | | - /* |
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551 | | - * Push GPIO specific irqdomain on hierarchy created as a side |
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552 | | - * effect of the pci_enable_msix() |
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553 | | - */ |
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554 | | - txgpio->irqd = irq_domain_create_hierarchy(irq_get_irq_data(txgpio->msix_entries[0].vector)->domain, |
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555 | | - 0, 0, of_node_to_fwnode(dev->of_node), |
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556 | | - &thunderx_gpio_irqd_ops, txgpio); |
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557 | | - if (!txgpio->irqd) { |
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558 | | - err = -ENOMEM; |
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559 | | - goto out; |
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560 | | - } |
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561 | | - |
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562 | | - /* Push on irq_data and the domain for each line. */ |
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563 | | - for (i = 0; i < ngpio; i++) { |
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564 | | - err = irq_domain_push_irq(txgpio->irqd, |
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565 | | - txgpio->msix_entries[i].vector, |
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566 | | - &txgpio->line_entries[i]); |
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567 | | - if (err < 0) |
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568 | | - dev_err(dev, "irq_domain_push_irq: %d\n", err); |
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569 | | - } |
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570 | | - |
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571 | 519 | chip->label = KBUILD_MODNAME; |
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572 | 520 | chip->parent = dev; |
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573 | 521 | chip->owner = THIS_MODULE; |
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.. | .. |
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582 | 530 | chip->set = thunderx_gpio_set; |
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583 | 531 | chip->set_multiple = thunderx_gpio_set_multiple; |
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584 | 532 | chip->set_config = thunderx_gpio_set_config; |
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585 | | - chip->to_irq = thunderx_gpio_to_irq; |
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| 533 | + girq = &chip->irq; |
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| 534 | + girq->chip = &thunderx_gpio_irq_chip; |
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| 535 | + girq->fwnode = of_node_to_fwnode(dev->of_node); |
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| 536 | + girq->parent_domain = |
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| 537 | + irq_get_irq_data(txgpio->msix_entries[0].vector)->domain; |
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| 538 | + girq->child_to_parent_hwirq = thunderx_gpio_child_to_parent_hwirq; |
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| 539 | + girq->populate_parent_alloc_arg = thunderx_gpio_populate_parent_alloc_info; |
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| 540 | + girq->handler = handle_bad_irq; |
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| 541 | + girq->default_type = IRQ_TYPE_NONE; |
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| 542 | + |
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586 | 543 | err = devm_gpiochip_add_data(dev, chip, txgpio); |
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587 | 544 | if (err) |
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588 | 545 | goto out; |
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| 546 | + |
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| 547 | + /* Push on irq_data and the domain for each line. */ |
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| 548 | + for (i = 0; i < ngpio; i++) { |
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| 549 | + struct irq_fwspec fwspec; |
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| 550 | + |
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| 551 | + fwspec.fwnode = of_node_to_fwnode(dev->of_node); |
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| 552 | + fwspec.param_count = 2; |
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| 553 | + fwspec.param[0] = i; |
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| 554 | + fwspec.param[1] = IRQ_TYPE_NONE; |
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| 555 | + err = irq_domain_push_irq(girq->domain, |
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| 556 | + txgpio->msix_entries[i].vector, |
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| 557 | + &fwspec); |
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| 558 | + if (err < 0) |
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| 559 | + dev_err(dev, "irq_domain_push_irq: %d\n", err); |
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| 560 | + } |
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589 | 561 | |
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590 | 562 | dev_info(dev, "ThunderX GPIO: %d lines with base %d.\n", |
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591 | 563 | ngpio, chip->base); |
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.. | .. |
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601 | 573 | struct thunderx_gpio *txgpio = pci_get_drvdata(pdev); |
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602 | 574 | |
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603 | 575 | for (i = 0; i < txgpio->chip.ngpio; i++) |
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604 | | - irq_domain_pop_irq(txgpio->irqd, |
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| 576 | + irq_domain_pop_irq(txgpio->chip.irq.domain, |
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605 | 577 | txgpio->msix_entries[i].vector); |
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606 | 578 | |
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607 | | - irq_domain_remove(txgpio->irqd); |
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| 579 | + irq_domain_remove(txgpio->chip.irq.domain); |
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608 | 580 | |
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609 | 581 | pci_set_drvdata(pdev, NULL); |
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610 | 582 | } |
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