add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/gpio/gpio-tegra.c
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@@ -1,20 +1,12 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * arch/arm/mach-tegra/gpio.c
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  *
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  * Copyright (c) 2010 Google, Inc
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+ * Copyright (c) 2011-2016, NVIDIA CORPORATION.  All rights reserved.
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  *
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  * Author:
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  *	Erik Gilling <konkers@google.com>
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- *
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- * This software is licensed under the terms of the GNU General Public
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- * License version 2, as published by the Free Software Foundation, and
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- * may be copied, distributed, and modified under those terms.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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  */
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11
 
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 #include <linux/err.h>
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@@ -104,12 +96,12 @@
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 static inline void tegra_gpio_writel(struct tegra_gpio_info *tgi,
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 				     u32 val, u32 reg)
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 {
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-	__raw_writel(val, tgi->regs + reg);
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+	writel_relaxed(val, tgi->regs + reg);
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 }
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 static inline u32 tegra_gpio_readl(struct tegra_gpio_info *tgi, u32 reg)
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 {
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-	return __raw_readl(tgi->regs + reg);
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+	return readl_relaxed(tgi->regs + reg);
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 }
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 static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port,
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@@ -141,14 +133,14 @@
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133
 
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 static int tegra_gpio_request(struct gpio_chip *chip, unsigned int offset)
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 {
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-	return pinctrl_gpio_request(offset);
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+	return pinctrl_gpio_request(chip->base + offset);
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 }
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 static void tegra_gpio_free(struct gpio_chip *chip, unsigned int offset)
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 {
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 	struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
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142
 
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-	pinctrl_gpio_free(offset);
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+	pinctrl_gpio_free(chip->base + offset);
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 	tegra_gpio_disable(tgi, offset);
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 }
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@@ -176,10 +168,18 @@
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 				      unsigned int offset)
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 {
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 	struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
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+	int ret;
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 	tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 0);
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 	tegra_gpio_enable(tgi, offset);
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-	return 0;
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+
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+	ret = pinctrl_gpio_direction_input(chip->base + offset);
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+	if (ret < 0)
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+		dev_err(tgi->dev,
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+			"Failed to set pinctrl input direction of GPIO %d: %d",
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+			 chip->base + offset, ret);
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+
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+	return ret;
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 }
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 static int tegra_gpio_direction_output(struct gpio_chip *chip,
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@@ -187,11 +187,19 @@
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 				       int value)
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 {
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 	struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
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+	int ret;
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 	tegra_gpio_set(chip, offset, value);
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 	tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 1);
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 	tegra_gpio_enable(tgi, offset);
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-	return 0;
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+
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+	ret = pinctrl_gpio_direction_output(chip->base + offset);
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+	if (ret < 0)
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+		dev_err(tgi->dev,
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+			"Failed to set pinctrl output direction of GPIO %d: %d",
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+			 chip->base + offset, ret);
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+
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+	return ret;
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 }
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 static int tegra_gpio_get_direction(struct gpio_chip *chip,
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@@ -207,7 +215,10 @@
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 	oe = tegra_gpio_readl(tgi, GPIO_OE(tgi, offset));
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-	return !(oe & pin_mask);
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+	if (oe & pin_mask)
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+		return GPIO_LINE_DIRECTION_OUT;
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+
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+	return GPIO_LINE_DIRECTION_IN;
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 }
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 static int tegra_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset,
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@@ -405,12 +416,8 @@
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 #ifdef CONFIG_PM_SLEEP
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 static int tegra_gpio_resume(struct device *dev)
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 {
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-	struct platform_device *pdev = to_platform_device(dev);
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-	struct tegra_gpio_info *tgi = platform_get_drvdata(pdev);
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-	unsigned long flags;
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+	struct tegra_gpio_info *tgi = dev_get_drvdata(dev);
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 	unsigned int b, p;
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-
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-	local_irq_save(flags);
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 	for (b = 0; b < tgi->bank_count; b++) {
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 		struct tegra_gpio_bank *bank = &tgi->bank_info[b];
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@@ -439,18 +446,14 @@
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 		}
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 	}
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-	local_irq_restore(flags);
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 	return 0;
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 }
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 static int tegra_gpio_suspend(struct device *dev)
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 {
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-	struct platform_device *pdev = to_platform_device(dev);
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-	struct tegra_gpio_info *tgi = platform_get_drvdata(pdev);
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-	unsigned long flags;
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+	struct tegra_gpio_info *tgi = dev_get_drvdata(dev);
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 	unsigned int b, p;
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-	local_irq_save(flags);
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 	for (b = 0; b < tgi->bank_count; b++) {
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 		struct tegra_gpio_bank *bank = &tgi->bank_info[b];
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@@ -480,7 +483,7 @@
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 					  GPIO_INT_ENB(tgi, gpio));
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 		}
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 	}
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-	local_irq_restore(flags);
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+
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 	return 0;
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 }
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@@ -489,6 +492,11 @@
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 	struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
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 	unsigned int gpio = d->hwirq;
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 	u32 port, bit, mask;
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+	int err;
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+
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+	err = irq_set_irq_wake(bank->irq, enable);
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+	if (err)
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+		return err;
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 	port = GPIO_PORT(gpio);
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 	bit = GPIO_BIT(gpio);
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@@ -499,7 +507,7 @@
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 	else
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 		bank->wake_enb[port] &= ~mask;
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-	return irq_set_irq_wake(bank->irq, enable);
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+	return 0;
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 }
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 #endif
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@@ -536,8 +544,8 @@
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 static void tegra_gpio_debuginit(struct tegra_gpio_info *tgi)
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 {
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-	(void) debugfs_create_file("tegra_gpio", 0444,
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-				   NULL, tgi, &tegra_dbg_gpio_fops);
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+	debugfs_create_file("tegra_gpio", 0444, NULL, tgi,
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+			    &tegra_dbg_gpio_fops);
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 }
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 #else
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@@ -549,13 +557,12 @@
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 #endif
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 static const struct dev_pm_ops tegra_gpio_pm_ops = {
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-	SET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume)
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+	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume)
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 };
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 static int tegra_gpio_probe(struct platform_device *pdev)
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 {
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 	struct tegra_gpio_info *tgi;
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-	struct resource *res;
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 	struct tegra_gpio_bank *bank;
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 	unsigned int gpio, i, j;
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 	int ret;
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@@ -620,10 +627,8 @@
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 	for (i = 0; i < tgi->bank_count; i++) {
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 		ret = platform_get_irq(pdev, i);
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-		if (ret < 0) {
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-			dev_err(&pdev->dev, "Missing IRQ resource: %d\n", ret);
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+		if (ret < 0)
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 			return ret;
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-		}
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 		bank = &tgi->bank_info[i];
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 		bank->bank = i;
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@@ -631,8 +636,7 @@
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 		bank->tgi = tgi;
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 	}
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-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	tgi->regs = devm_ioremap_resource(&pdev->dev, res);
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+	tgi->regs = devm_platform_ioremap_resource(pdev, 0);
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 	if (IS_ERR(tgi->regs))
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 		return PTR_ERR(tgi->regs);
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