add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/fsi/fsi-master.h
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@@ -1,17 +1,9 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * FSI master definitions. These comprise the core <--> master interface,
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  * to allow the core to interact with the (hardware-specific) masters.
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  *
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  * Copyright (C) IBM Corporation 2016
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #ifndef DRIVERS_FSI_MASTER_H
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@@ -19,6 +11,71 @@
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 #include <linux/device.h>
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 #include <linux/mutex.h>
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+
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+/*
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+ * Master registers
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+ *
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+ * These are used by hardware masters, such as the one in the FSP2, AST2600 and
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+ * the hub master in POWER processors.
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+ */
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+
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+/* Control Registers */
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+#define FSI_MMODE		0x0		/* R/W: mode */
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+#define FSI_MDLYR		0x4		/* R/W: delay */
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+#define FSI_MCRSP		0x8		/* R/W: clock rate */
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+#define FSI_MENP0		0x10		/* R/W: enable */
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+#define FSI_MLEVP0		0x18		/* R: plug detect */
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+#define FSI_MSENP0		0x18		/* S: Set enable */
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+#define FSI_MCENP0		0x20		/* C: Clear enable */
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+#define FSI_MAEB		0x70		/* R: Error address */
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+#define FSI_MVER		0x74		/* R: master version/type */
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+#define FSI_MSTAP0		0xd0		/* R: Port status */
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+#define FSI_MRESP0		0xd0		/* W: Port reset */
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+#define FSI_MESRB0		0x1d0		/* R: Master error status */
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+#define FSI_MRESB0		0x1d0		/* W: Reset bridge */
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+#define FSI_MSCSB0		0x1d4		/* R: Master sub command stack */
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+#define FSI_MATRB0		0x1d8		/* R: Master address trace */
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+#define FSI_MDTRB0		0x1dc		/* R: Master data trace */
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+#define FSI_MECTRL		0x2e0		/* W: Error control */
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+
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+/* MMODE: Mode control */
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+#define FSI_MMODE_EIP		0x80000000	/* Enable interrupt polling */
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+#define FSI_MMODE_ECRC		0x40000000	/* Enable error recovery */
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+#define FSI_MMODE_RELA		0x20000000	/* Enable relative address commands */
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+#define FSI_MMODE_EPC		0x10000000	/* Enable parity checking */
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+#define FSI_MMODE_P8_TO_LSB	0x00000010	/* Timeout value LSB */
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+						/*   MSB=1, LSB=0 is 0.8 ms */
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+						/*   MSB=0, LSB=1 is 0.9 ms */
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+#define FSI_MMODE_CRS0SHFT	18		/* Clk rate selection 0 shift */
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+#define FSI_MMODE_CRS0MASK	0x3ff		/* Clk rate selection 0 mask */
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+#define FSI_MMODE_CRS1SHFT	8		/* Clk rate selection 1 shift */
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+#define FSI_MMODE_CRS1MASK	0x3ff		/* Clk rate selection 1 mask */
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+
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+/* MRESB: Reset brindge */
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+#define FSI_MRESB_RST_GEN	0x80000000	/* General reset */
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+#define FSI_MRESB_RST_ERR	0x40000000	/* Error Reset */
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+
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+/* MRESP: Reset port */
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+#define FSI_MRESP_RST_ALL_MASTER 0x20000000	/* Reset all FSI masters */
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+#define FSI_MRESP_RST_ALL_LINK	0x10000000	/* Reset all FSI port contr. */
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+#define FSI_MRESP_RST_MCR	0x08000000	/* Reset FSI master reg. */
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+#define FSI_MRESP_RST_PYE	0x04000000	/* Reset FSI parity error */
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+#define FSI_MRESP_RST_ALL	0xfc000000	/* Reset any error */
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+
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+/* MECTRL: Error control */
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+#define FSI_MECTRL_EOAE		0x8000		/* Enable machine check when */
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+						/* master 0 in error */
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+#define FSI_MECTRL_P8_AUTO_TERM	0x4000		/* Auto terminate */
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+
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+#define FSI_HUB_LINK_OFFSET		0x80000
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+#define FSI_HUB_LINK_SIZE		0x80000
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+#define FSI_HUB_MASTER_MAX_LINKS	8
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+
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+/*
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+ * Protocol definitions
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+ *
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+ * These are used by low level masters that bit-bang out the protocol
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+ */
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 /* Various protocol delays */
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 #define	FSI_ECHO_DELAY_CLOCKS	16	/* Number clocks for echo delay */
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@@ -55,6 +112,12 @@
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 /* fsi-master definition and flags */
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 #define FSI_MASTER_FLAG_SWCLOCK		0x1
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+/*
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+ * Structures and function prototypes
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+ *
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+ * These are common to all masters
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+ */
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+
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 struct fsi_master {
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 	struct device	dev;
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 	int		idx;
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 				uint32_t addr, const void *val, size_t size);
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 	int		(*term)(struct fsi_master *, int link, uint8_t id);
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 	int		(*send_break)(struct fsi_master *, int link);
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-	int		(*link_enable)(struct fsi_master *, int link);
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+	int		(*link_enable)(struct fsi_master *, int link,
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+				       bool enable);
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 	int		(*link_config)(struct fsi_master *, int link,
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 				       u8 t_send_delay, u8 t_echo_delay);
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 };