.. | .. |
---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
---|
1 | 2 | /* |
---|
2 | 3 | * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved. |
---|
3 | | - * |
---|
4 | | - * This program is free software; you can redistribute it and/or modify it |
---|
5 | | - * under the terms of the GNU General Public License as published by the Free |
---|
6 | | - * Software Foundation; either version 2 of the License, or (at your option) |
---|
7 | | - * any later version. |
---|
8 | | - * |
---|
9 | | - * This program is distributed in the hope that it will be useful, but WITHOUT |
---|
10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
---|
11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
---|
12 | | - * more details. |
---|
13 | | - * |
---|
14 | | - * The full GNU General Public License is included in this distribution in the |
---|
15 | | - * file called COPYING. |
---|
16 | 4 | */ |
---|
17 | 5 | #ifndef IOATDMA_H |
---|
18 | 6 | #define IOATDMA_H |
---|
.. | .. |
---|
27 | 15 | #include "registers.h" |
---|
28 | 16 | #include "hw.h" |
---|
29 | 17 | |
---|
30 | | -#define IOAT_DMA_VERSION "4.00" |
---|
| 18 | +#define IOAT_DMA_VERSION "5.00" |
---|
31 | 19 | |
---|
32 | 20 | #define IOAT_DMA_DCA_ANY_CPU ~0 |
---|
33 | 21 | |
---|
.. | .. |
---|
93 | 81 | u32 msixpba; |
---|
94 | 82 | }; |
---|
95 | 83 | |
---|
| 84 | +#define IOAT_MAX_ORDER 16 |
---|
| 85 | +#define IOAT_MAX_DESCS (1 << IOAT_MAX_ORDER) |
---|
| 86 | +#define IOAT_CHUNK_SIZE (SZ_512K) |
---|
| 87 | +#define IOAT_DESCS_PER_CHUNK (IOAT_CHUNK_SIZE / IOAT_DESC_SZ) |
---|
| 88 | + |
---|
96 | 89 | struct ioat_descs { |
---|
97 | 90 | void *virt; |
---|
98 | 91 | dma_addr_t hw; |
---|
.. | .. |
---|
138 | 131 | u16 produce; |
---|
139 | 132 | struct ioat_ring_ent **ring; |
---|
140 | 133 | spinlock_t prep_lock; |
---|
141 | | - struct ioat_descs descs[2]; |
---|
| 134 | + struct ioat_descs descs[IOAT_MAX_DESCS / IOAT_DESCS_PER_CHUNK]; |
---|
142 | 135 | int desc_chunks; |
---|
143 | 136 | int intr_coalesce; |
---|
144 | 137 | int prev_intr_coalesce; |
---|
.. | .. |
---|
311 | 304 | return !!err; |
---|
312 | 305 | } |
---|
313 | 306 | |
---|
314 | | -#define IOAT_MAX_ORDER 16 |
---|
315 | | -#define IOAT_MAX_DESCS 65536 |
---|
316 | | -#define IOAT_DESCS_PER_2M 32768 |
---|
317 | 307 | |
---|
318 | 308 | static inline u32 ioat_ring_size(struct ioatdma_chan *ioat_chan) |
---|
319 | 309 | { |
---|
.. | .. |
---|
403 | 393 | enum dma_status |
---|
404 | 394 | ioat_tx_status(struct dma_chan *c, dma_cookie_t cookie, |
---|
405 | 395 | struct dma_tx_state *txstate); |
---|
406 | | -void ioat_cleanup_event(unsigned long data); |
---|
| 396 | +void ioat_cleanup_event(struct tasklet_struct *t); |
---|
407 | 397 | void ioat_timer_event(struct timer_list *t); |
---|
408 | 398 | int ioat_check_space_lock(struct ioatdma_chan *ioat_chan, int num_descs); |
---|
409 | 399 | void ioat_issue_pending(struct dma_chan *chan); |
---|