.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * driver/dma/coh901318.c |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2007-2009 ST-Ericsson |
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5 | | - * License terms: GNU General Public License (GPL) version 2 |
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6 | 6 | * DMA driver for COH 901 318 |
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7 | 7 | * Author: Per Friden <per.friden@stericsson.com> |
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8 | 8 | */ |
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.. | .. |
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1306 | 1306 | unsigned long nbr_active_done; |
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1307 | 1307 | unsigned long busy; |
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1308 | 1308 | |
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| 1309 | + struct dma_slave_config config; |
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1309 | 1310 | u32 addr; |
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1310 | 1311 | u32 ctrl; |
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1311 | 1312 | |
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.. | .. |
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1377 | 1378 | |
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1378 | 1379 | dma_dentry = debugfs_create_dir("dma", NULL); |
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1379 | 1380 | |
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1380 | | - (void) debugfs_create_file("status", |
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1381 | | - S_IFREG | S_IRUGO, |
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1382 | | - dma_dentry, NULL, |
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1383 | | - &coh901318_debugfs_status_operations); |
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| 1381 | + debugfs_create_file("status", S_IFREG | S_IRUGO, dma_dentry, NULL, |
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| 1382 | + &coh901318_debugfs_status_operations); |
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1384 | 1383 | return 0; |
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1385 | 1384 | } |
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1386 | 1385 | |
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.. | .. |
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1401 | 1400 | { |
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1402 | 1401 | return container_of(chan, struct coh901318_chan, chan); |
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1403 | 1402 | } |
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| 1403 | + |
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| 1404 | +static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan, |
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| 1405 | + struct dma_slave_config *config, |
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| 1406 | + enum dma_transfer_direction direction); |
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1404 | 1407 | |
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1405 | 1408 | static inline const struct coh901318_params * |
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1406 | 1409 | cohc_chan_param(struct coh901318_chan *cohc) |
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.. | .. |
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1865 | 1868 | * This tasklet is called from the interrupt handler to |
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1866 | 1869 | * handle each descriptor (DMA job) that is sent to a channel. |
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1867 | 1870 | */ |
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1868 | | -static void dma_tasklet(unsigned long data) |
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| 1871 | +static void dma_tasklet(struct tasklet_struct *t) |
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1869 | 1872 | { |
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1870 | | - struct coh901318_chan *cohc = (struct coh901318_chan *) data; |
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| 1873 | + struct coh901318_chan *cohc = from_tasklet(cohc, t, tasklet); |
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1871 | 1874 | struct coh901318_desc *cohd_fin; |
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1872 | 1875 | unsigned long flags; |
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1873 | 1876 | struct dmaengine_desc_callback cb; |
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.. | .. |
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2351 | 2354 | if (lli == NULL) |
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2352 | 2355 | goto err_dma_alloc; |
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2353 | 2356 | |
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| 2357 | + coh901318_dma_set_runtimeconfig(chan, &cohc->config, direction); |
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| 2358 | + |
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2354 | 2359 | /* initiate allocated lli list */ |
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2355 | 2360 | ret = coh901318_lli_fill_sg(&cohc->base->pool, lli, sgl, sg_len, |
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2356 | 2361 | cohc->addr, |
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.. | .. |
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2490 | 2495 | }; |
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2491 | 2496 | |
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2492 | 2497 | static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan, |
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2493 | | - struct dma_slave_config *config) |
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| 2498 | + struct dma_slave_config *config, |
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| 2499 | + enum dma_transfer_direction direction) |
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2494 | 2500 | { |
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2495 | 2501 | struct coh901318_chan *cohc = to_coh901318_chan(chan); |
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2496 | 2502 | dma_addr_t addr; |
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.. | .. |
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2500 | 2506 | int i = 0; |
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2501 | 2507 | |
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2502 | 2508 | /* We only support mem to per or per to mem transfers */ |
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2503 | | - if (config->direction == DMA_DEV_TO_MEM) { |
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| 2509 | + if (direction == DMA_DEV_TO_MEM) { |
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2504 | 2510 | addr = config->src_addr; |
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2505 | 2511 | addr_width = config->src_addr_width; |
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2506 | 2512 | maxburst = config->src_maxburst; |
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2507 | | - } else if (config->direction == DMA_MEM_TO_DEV) { |
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| 2513 | + } else if (direction == DMA_MEM_TO_DEV) { |
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2508 | 2514 | addr = config->dst_addr; |
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2509 | 2515 | addr_width = config->dst_addr_width; |
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2510 | 2516 | maxburst = config->dst_maxburst; |
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.. | .. |
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2570 | 2576 | return 0; |
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2571 | 2577 | } |
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2572 | 2578 | |
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| 2579 | +static int coh901318_dma_slave_config(struct dma_chan *chan, |
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| 2580 | + struct dma_slave_config *config) |
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| 2581 | +{ |
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| 2582 | + struct coh901318_chan *cohc = to_coh901318_chan(chan); |
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| 2583 | + |
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| 2584 | + memcpy(&cohc->config, config, sizeof(*config)); |
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| 2585 | + |
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| 2586 | + return 0; |
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| 2587 | +} |
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| 2588 | + |
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2573 | 2589 | static void coh901318_base_init(struct dma_device *dma, const int *pick_chans, |
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2574 | 2590 | struct coh901318_base *base) |
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2575 | 2591 | { |
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.. | .. |
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2599 | 2615 | INIT_LIST_HEAD(&cohc->active); |
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2600 | 2616 | INIT_LIST_HEAD(&cohc->queue); |
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2601 | 2617 | |
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2602 | | - tasklet_init(&cohc->tasklet, dma_tasklet, |
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2603 | | - (unsigned long) cohc); |
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| 2618 | + tasklet_setup(&cohc->tasklet, dma_tasklet); |
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2604 | 2619 | |
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2605 | 2620 | list_add_tail(&cohc->chan.device_node, |
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2606 | 2621 | &dma->channels); |
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.. | .. |
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2675 | 2690 | base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg; |
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2676 | 2691 | base->dma_slave.device_tx_status = coh901318_tx_status; |
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2677 | 2692 | base->dma_slave.device_issue_pending = coh901318_issue_pending; |
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2678 | | - base->dma_slave.device_config = coh901318_dma_set_runtimeconfig; |
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| 2693 | + base->dma_slave.device_config = coh901318_dma_slave_config; |
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2679 | 2694 | base->dma_slave.device_pause = coh901318_pause; |
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2680 | 2695 | base->dma_slave.device_resume = coh901318_resume; |
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2681 | 2696 | base->dma_slave.device_terminate_all = coh901318_terminate_all; |
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.. | .. |
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2698 | 2713 | base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy; |
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2699 | 2714 | base->dma_memcpy.device_tx_status = coh901318_tx_status; |
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2700 | 2715 | base->dma_memcpy.device_issue_pending = coh901318_issue_pending; |
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2701 | | - base->dma_memcpy.device_config = coh901318_dma_set_runtimeconfig; |
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| 2716 | + base->dma_memcpy.device_config = coh901318_dma_slave_config; |
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2702 | 2717 | base->dma_memcpy.device_pause = coh901318_pause; |
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2703 | 2718 | base->dma_memcpy.device_resume = coh901318_resume; |
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2704 | 2719 | base->dma_memcpy.device_terminate_all = coh901318_terminate_all; |
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