hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/dma/at_hdmac_regs.h
....@@ -1,12 +1,8 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23 * Header file for the Atmel AHB DMA Controller driver
34 *
45 * Copyright (C) 2008 Atmel Corporation
5
- *
6
- * This program is free software; you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License as published by
8
- * the Free Software Foundation; either version 2 of the License, or
9
- * (at your option) any later version.
106 */
117 #ifndef AT_HDMAC_REGS_H
128 #define AT_HDMAC_REGS_H
....@@ -168,13 +164,13 @@
168164 /* LLI == Linked List Item; aka DMA buffer descriptor */
169165 struct at_lli {
170166 /* values that are not changed by hardware */
171
- dma_addr_t saddr;
172
- dma_addr_t daddr;
167
+ u32 saddr;
168
+ u32 daddr;
173169 /* value that may get written back: */
174
- u32 ctrla;
170
+ u32 ctrla;
175171 /* more values that are not changed by hardware */
176
- u32 ctrlb;
177
- dma_addr_t dscr; /* chain to next lli */
172
+ u32 ctrlb;
173
+ u32 dscr; /* chain to next lli */
178174 };
179175
180176 /**
....@@ -247,7 +243,6 @@
247243 * @active_list: list of descriptors dmaengine is being running on
248244 * @queue: list of descriptors ready to be submitted to engine
249245 * @free_list: list of descriptors usable by the channel
250
- * @descs_allocated: records the actual size of the descriptor pool
251246 */
252247 struct at_dma_chan {
253248 struct dma_chan chan_common;
....@@ -268,7 +263,6 @@
268263 struct list_head active_list;
269264 struct list_head queue;
270265 struct list_head free_list;
271
- unsigned int descs_allocated;
272266 };
273267
274268 #define channel_readl(atchan, name) \
....@@ -337,7 +331,7 @@
337331 struct dma_pool *dma_desc_pool;
338332 struct dma_pool *memset_pool;
339333 /* AT THE END channels table */
340
- struct at_dma_chan chan[0];
334
+ struct at_dma_chan chan[];
341335 };
342336
343337 #define dma_readl(atdma, name) \