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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Zynq PLL driver |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2013 Xilinx |
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5 | 6 | * |
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6 | 7 | * Sören Brinkmann <soren.brinkmann@xilinx.com> |
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7 | | - * |
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8 | | - * This program is free software: you can redistribute it and/or modify |
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9 | | - * it under the terms of the GNU General Public License v2 as published by |
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10 | | - * the Free Software Foundation. |
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11 | | - * |
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12 | | - * This program is distributed in the hope that it will be useful, |
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13 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 | | - * GNU General Public License for more details. |
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16 | | - * |
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17 | | - * You should have received a copy of the GNU General Public License |
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18 | | - * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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19 | | - * |
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20 | 8 | */ |
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21 | 9 | #include <linux/clk/zynq.h> |
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22 | 10 | #include <linux/clk-provider.h> |
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.. | .. |
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90 | 78 | * makes probably sense to redundantly save fbdiv in the struct |
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91 | 79 | * zynq_pll to save the IO access. |
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92 | 80 | */ |
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93 | | - fbdiv = (clk_readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >> |
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| 81 | + fbdiv = (readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >> |
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94 | 82 | PLLCTRL_FBDIV_SHIFT; |
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95 | 83 | |
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96 | 84 | return parent_rate * fbdiv; |
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.. | .. |
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112 | 100 | |
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113 | 101 | spin_lock_irqsave(clk->lock, flags); |
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114 | 102 | |
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115 | | - reg = clk_readl(clk->pll_ctrl); |
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| 103 | + reg = readl(clk->pll_ctrl); |
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116 | 104 | |
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117 | 105 | spin_unlock_irqrestore(clk->lock, flags); |
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118 | 106 | |
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.. | .. |
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138 | 126 | /* Power up PLL and wait for lock */ |
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139 | 127 | spin_lock_irqsave(clk->lock, flags); |
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140 | 128 | |
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141 | | - reg = clk_readl(clk->pll_ctrl); |
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| 129 | + reg = readl(clk->pll_ctrl); |
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142 | 130 | reg &= ~(PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK); |
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143 | | - clk_writel(reg, clk->pll_ctrl); |
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144 | | - while (!(clk_readl(clk->pll_status) & (1 << clk->lockbit))) |
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| 131 | + writel(reg, clk->pll_ctrl); |
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| 132 | + while (!(readl(clk->pll_status) & (1 << clk->lockbit))) |
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145 | 133 | ; |
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146 | 134 | |
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147 | 135 | spin_unlock_irqrestore(clk->lock, flags); |
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.. | .. |
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168 | 156 | /* shut down PLL */ |
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169 | 157 | spin_lock_irqsave(clk->lock, flags); |
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170 | 158 | |
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171 | | - reg = clk_readl(clk->pll_ctrl); |
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| 159 | + reg = readl(clk->pll_ctrl); |
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172 | 160 | reg |= PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK; |
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173 | | - clk_writel(reg, clk->pll_ctrl); |
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| 161 | + writel(reg, clk->pll_ctrl); |
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174 | 162 | |
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175 | 163 | spin_unlock_irqrestore(clk->lock, flags); |
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176 | 164 | } |
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.. | .. |
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223 | 211 | |
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224 | 212 | spin_lock_irqsave(pll->lock, flags); |
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225 | 213 | |
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226 | | - reg = clk_readl(pll->pll_ctrl); |
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| 214 | + reg = readl(pll->pll_ctrl); |
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227 | 215 | reg &= ~PLLCTRL_BPQUAL_MASK; |
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228 | | - clk_writel(reg, pll->pll_ctrl); |
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| 216 | + writel(reg, pll->pll_ctrl); |
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229 | 217 | |
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230 | 218 | spin_unlock_irqrestore(pll->lock, flags); |
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231 | 219 | |
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