hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/clk/samsung/clk-s3c2443.c
....@@ -1,17 +1,15 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
6
- * published by the Free Software Foundation.
74 *
85 * Common Clock Framework support for S3C2443 and following SoCs.
96 */
107
118 #include <linux/clk-provider.h>
9
+#include <linux/clk/samsung.h>
10
+#include <linux/io.h>
1211 #include <linux/of.h>
1312 #include <linux/of_address.h>
14
-#include <linux/syscore_ops.h>
1513 #include <linux/reboot.h>
1614
1715 #include <dt-bindings/clock/s3c2443.h>
....@@ -43,9 +41,6 @@
4341
4442 static void __iomem *reg_base;
4543
46
-#ifdef CONFIG_PM_SLEEP
47
-static struct samsung_clk_reg_dump *s3c2443_save;
48
-
4944 /*
5045 * list of controller registers to be saved and restored during a
5146 * suspend/resume cycle.
....@@ -64,42 +59,6 @@
6459 HCLKCON,
6560 SCLKCON,
6661 };
67
-
68
-static int s3c2443_clk_suspend(void)
69
-{
70
- samsung_clk_save(reg_base, s3c2443_save,
71
- ARRAY_SIZE(s3c2443_clk_regs));
72
-
73
- return 0;
74
-}
75
-
76
-static void s3c2443_clk_resume(void)
77
-{
78
- samsung_clk_restore(reg_base, s3c2443_save,
79
- ARRAY_SIZE(s3c2443_clk_regs));
80
-}
81
-
82
-static struct syscore_ops s3c2443_clk_syscore_ops = {
83
- .suspend = s3c2443_clk_suspend,
84
- .resume = s3c2443_clk_resume,
85
-};
86
-
87
-static void __init s3c2443_clk_sleep_init(void)
88
-{
89
- s3c2443_save = samsung_clk_alloc_reg_dump(s3c2443_clk_regs,
90
- ARRAY_SIZE(s3c2443_clk_regs));
91
- if (!s3c2443_save) {
92
- pr_warn("%s: failed to allocate sleep save data, no sleep support!\n",
93
- __func__);
94
- return;
95
- }
96
-
97
- register_syscore_ops(&s3c2443_clk_syscore_ops);
98
- return;
99
-}
100
-#else
101
-static void __init s3c2443_clk_sleep_init(void) {}
102
-#endif
10362
10463 PNAME(epllref_p) = { "mpllref", "mpllref", "xti", "ext" };
10564 PNAME(esysclk_p) = { "epllref", "epll" };
....@@ -429,7 +388,7 @@
429388 ARRAY_SIZE(s3c2450_gates));
430389 samsung_clk_register_alias(ctx, s3c2450_aliases,
431390 ARRAY_SIZE(s3c2450_aliases));
432
- /* fall through, as s3c2450 extends the s3c2416 clocks */
391
+ fallthrough; /* as s3c2450 extends the s3c2416 clocks */
433392 case S3C2416:
434393 samsung_clk_register_div(ctx, s3c2416_dividers,
435394 ARRAY_SIZE(s3c2416_dividers));
....@@ -450,7 +409,8 @@
450409 break;
451410 }
452411
453
- s3c2443_clk_sleep_init();
412
+ samsung_clk_sleep_init(reg_base, s3c2443_clk_regs,
413
+ ARRAY_SIZE(s3c2443_clk_regs));
454414
455415 samsung_clk_of_add_provider(np, ctx);
456416