add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/clk/pistachio/clk-pll.c
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@@ -1,9 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (C) 2014 Google, Inc.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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  */
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 #define pr_fmt(fmt) "%s: " fmt, __func__
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@@ -298,7 +295,7 @@
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 	return rate;
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 }
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-static struct clk_ops pll_gf40lp_frac_ops = {
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+static const struct clk_ops pll_gf40lp_frac_ops = {
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 	.enable = pll_gf40lp_frac_enable,
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 	.disable = pll_gf40lp_frac_disable,
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 	.is_enabled = pll_gf40lp_frac_is_enabled,
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@@ -307,7 +304,7 @@
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 	.set_rate = pll_gf40lp_frac_set_rate,
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 };
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-static struct clk_ops pll_gf40lp_frac_fixed_ops = {
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+static const struct clk_ops pll_gf40lp_frac_fixed_ops = {
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 	.enable = pll_gf40lp_frac_enable,
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 	.disable = pll_gf40lp_frac_disable,
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 	.is_enabled = pll_gf40lp_frac_is_enabled,
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@@ -430,7 +427,7 @@
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 	return rate;
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 }
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-static struct clk_ops pll_gf40lp_laint_ops = {
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+static const struct clk_ops pll_gf40lp_laint_ops = {
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 	.enable = pll_gf40lp_laint_enable,
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 	.disable = pll_gf40lp_laint_disable,
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 	.is_enabled = pll_gf40lp_laint_is_enabled,
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@@ -439,7 +436,7 @@
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 	.set_rate = pll_gf40lp_laint_set_rate,
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 };
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-static struct clk_ops pll_gf40lp_laint_fixed_ops = {
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+static const struct clk_ops pll_gf40lp_laint_fixed_ops = {
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 	.enable = pll_gf40lp_laint_enable,
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 	.disable = pll_gf40lp_laint_disable,
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 	.is_enabled = pll_gf40lp_laint_is_enabled,
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@@ -453,7 +450,7 @@
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 				unsigned int nr_rates)
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 {
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 	struct pistachio_clk_pll *pll;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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 	struct clk *clk;
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 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);