forked from ~ljy/RK356X_SDK_RELEASE

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hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/drivers/clk/nxp/clk-lpc18xx-cgu.c
....@@ -10,6 +10,7 @@
1010 
1111 #include <linux/clk-provider.h>
1212 #include <linux/delay.h>
13
+#include <linux/io.h>
1314 #include <linux/kernel.h>
1415 #include <linux/of.h>
1516 #include <linux/of_address.h>
....@@ -352,9 +353,9 @@
352353 	struct lpc18xx_pll *pll = to_lpc_pll(hw);
353354 	u32 ctrl, mdiv, msel, npdiv;
354355 
355
-	ctrl = clk_readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
356
-	mdiv = clk_readl(pll->reg + LPC18XX_CGU_PLL0USB_MDIV);
357
-	npdiv = clk_readl(pll->reg + LPC18XX_CGU_PLL0USB_NP_DIV);
356
+	ctrl = readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
357
+	mdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_MDIV);
358
+	npdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_NP_DIV);
358359 
359360 	if (ctrl & LPC18XX_PLL0_CTRL_BYPASS)
360361 		return parent_rate;
....@@ -415,25 +416,25 @@
415416 	m |= lpc18xx_pll0_msel2seli(m) << LPC18XX_PLL0_MDIV_SELI_SHIFT;
416417 
417418 	/* Power down PLL, disable clk output and dividers */
418
-	ctrl = clk_readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
419
+	ctrl = readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
419420 	ctrl |= LPC18XX_PLL0_CTRL_PD;
420421 	ctrl &= ~(LPC18XX_PLL0_CTRL_BYPASS | LPC18XX_PLL0_CTRL_DIRECTI |
421422 		  LPC18XX_PLL0_CTRL_DIRECTO | LPC18XX_PLL0_CTRL_CLKEN);
422
-	clk_writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
423
+	writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
423424 
424425 	/* Configure new PLL settings */
425
-	clk_writel(m, pll->reg + LPC18XX_CGU_PLL0USB_MDIV);
426
-	clk_writel(LPC18XX_PLL0_NP_DIVS_1, pll->reg + LPC18XX_CGU_PLL0USB_NP_DIV);
426
+	writel(m, pll->reg + LPC18XX_CGU_PLL0USB_MDIV);
427
+	writel(LPC18XX_PLL0_NP_DIVS_1, pll->reg + LPC18XX_CGU_PLL0USB_NP_DIV);
427428 
428429 	/* Power up PLL and wait for lock */
429430 	ctrl &= ~LPC18XX_PLL0_CTRL_PD;
430
-	clk_writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
431
+	writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
431432 	do {
432433 		udelay(10);
433
-		stat = clk_readl(pll->reg + LPC18XX_CGU_PLL0USB_STAT);
434
+		stat = readl(pll->reg + LPC18XX_CGU_PLL0USB_STAT);
434435 		if (stat & LPC18XX_PLL0_STAT_LOCK) {
435436 			ctrl |= LPC18XX_PLL0_CTRL_CLKEN;
436
-			clk_writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
437
+			writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
437438 
438439 			return 0;
439440 		}
....@@ -458,8 +459,8 @@
458459 	bool direct, fbsel;
459460 	u32 stat, ctrl;
460461 
461
-	stat = clk_readl(pll->reg + LPC18XX_CGU_PLL1_STAT);
462
-	ctrl = clk_readl(pll->reg + LPC18XX_CGU_PLL1_CTRL);
462
+	stat = readl(pll->reg + LPC18XX_CGU_PLL1_STAT);
463
+	ctrl = readl(pll->reg + LPC18XX_CGU_PLL1_CTRL);
463464 
464465 	direct = (ctrl & LPC18XX_PLL1_CTRL_DIRECT) ? true : false;
465466 	fbsel = (ctrl & LPC18XX_PLL1_CTRL_FBSEL) ? true : false;