.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License as published by |
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6 | | - * the Free Software Foundation; either version 2 of the License, or |
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7 | | - * (at your option) any later version. |
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8 | | - * |
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9 | 4 | */ |
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10 | 5 | |
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11 | 6 | #include <linux/clk-provider.h> |
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.. | .. |
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33 | 28 | #define PLL_COUNT_SHIFT 8 |
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34 | 29 | #define PLL_OUT_SHIFT 14 |
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35 | 30 | #define PLL_MAX_ID 1 |
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36 | | - |
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37 | | -struct clk_pll_characteristics { |
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38 | | - struct clk_range input; |
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39 | | - int num_output; |
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40 | | - struct clk_range *output; |
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41 | | - u16 *icpll; |
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42 | | - u8 *out; |
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43 | | -}; |
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44 | | - |
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45 | | -struct clk_pll_layout { |
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46 | | - u32 pllr_mask; |
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47 | | - u16 mul_mask; |
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48 | | - u8 mul_shift; |
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49 | | -}; |
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50 | 31 | |
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51 | 32 | #define to_clk_pll(hw) container_of(hw, struct clk_pll, hw) |
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52 | 33 | |
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.. | .. |
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288 | 269 | .set_rate = clk_pll_set_rate, |
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289 | 270 | }; |
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290 | 271 | |
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291 | | -static struct clk_hw * __init |
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| 272 | +struct clk_hw * __init |
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292 | 273 | at91_clk_register_pll(struct regmap *regmap, const char *name, |
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293 | 274 | const char *parent_name, u8 id, |
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294 | 275 | const struct clk_pll_layout *layout, |
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.. | .. |
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296 | 277 | { |
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297 | 278 | struct clk_pll *pll; |
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298 | 279 | struct clk_hw *hw; |
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299 | | - struct clk_init_data init = {}; |
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| 280 | + struct clk_init_data init; |
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300 | 281 | int offset = PLL_REG(id); |
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301 | 282 | unsigned int pllr; |
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302 | 283 | int ret; |
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.. | .. |
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334 | 315 | } |
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335 | 316 | |
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336 | 317 | |
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337 | | -static const struct clk_pll_layout at91rm9200_pll_layout = { |
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| 318 | +const struct clk_pll_layout at91rm9200_pll_layout = { |
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338 | 319 | .pllr_mask = 0x7FFFFFF, |
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339 | 320 | .mul_shift = 16, |
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340 | 321 | .mul_mask = 0x7FF, |
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341 | 322 | }; |
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342 | 323 | |
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343 | | -static const struct clk_pll_layout at91sam9g45_pll_layout = { |
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| 324 | +const struct clk_pll_layout at91sam9g45_pll_layout = { |
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344 | 325 | .pllr_mask = 0xFFFFFF, |
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345 | 326 | .mul_shift = 16, |
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346 | 327 | .mul_mask = 0xFF, |
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347 | 328 | }; |
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348 | 329 | |
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349 | | -static const struct clk_pll_layout at91sam9g20_pllb_layout = { |
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| 330 | +const struct clk_pll_layout at91sam9g20_pllb_layout = { |
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350 | 331 | .pllr_mask = 0x3FFFFF, |
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351 | 332 | .mul_shift = 16, |
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352 | 333 | .mul_mask = 0x3F, |
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353 | 334 | }; |
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354 | 335 | |
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355 | | -static const struct clk_pll_layout sama5d3_pll_layout = { |
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| 336 | +const struct clk_pll_layout sama5d3_pll_layout = { |
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356 | 337 | .pllr_mask = 0x1FFFFFF, |
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357 | 338 | .mul_shift = 18, |
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358 | 339 | .mul_mask = 0x7F, |
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359 | 340 | }; |
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360 | | - |
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361 | | - |
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362 | | -static struct clk_pll_characteristics * __init |
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363 | | -of_at91_clk_pll_get_characteristics(struct device_node *np) |
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364 | | -{ |
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365 | | - int i; |
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366 | | - int offset; |
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367 | | - u32 tmp; |
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368 | | - int num_output; |
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369 | | - u32 num_cells; |
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370 | | - struct clk_range input; |
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371 | | - struct clk_range *output; |
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372 | | - u8 *out = NULL; |
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373 | | - u16 *icpll = NULL; |
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374 | | - struct clk_pll_characteristics *characteristics; |
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375 | | - |
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376 | | - if (of_at91_get_clk_range(np, "atmel,clk-input-range", &input)) |
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377 | | - return NULL; |
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378 | | - |
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379 | | - if (of_property_read_u32(np, "#atmel,pll-clk-output-range-cells", |
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380 | | - &num_cells)) |
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381 | | - return NULL; |
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382 | | - |
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383 | | - if (num_cells < 2 || num_cells > 4) |
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384 | | - return NULL; |
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385 | | - |
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386 | | - if (!of_get_property(np, "atmel,pll-clk-output-ranges", &tmp)) |
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387 | | - return NULL; |
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388 | | - num_output = tmp / (sizeof(u32) * num_cells); |
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389 | | - |
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390 | | - characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL); |
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391 | | - if (!characteristics) |
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392 | | - return NULL; |
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393 | | - |
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394 | | - output = kcalloc(num_output, sizeof(*output), GFP_KERNEL); |
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395 | | - if (!output) |
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396 | | - goto out_free_characteristics; |
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397 | | - |
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398 | | - if (num_cells > 2) { |
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399 | | - out = kcalloc(num_output, sizeof(*out), GFP_KERNEL); |
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400 | | - if (!out) |
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401 | | - goto out_free_output; |
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402 | | - } |
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403 | | - |
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404 | | - if (num_cells > 3) { |
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405 | | - icpll = kcalloc(num_output, sizeof(*icpll), GFP_KERNEL); |
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406 | | - if (!icpll) |
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407 | | - goto out_free_output; |
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408 | | - } |
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409 | | - |
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410 | | - for (i = 0; i < num_output; i++) { |
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411 | | - offset = i * num_cells; |
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412 | | - if (of_property_read_u32_index(np, |
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413 | | - "atmel,pll-clk-output-ranges", |
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414 | | - offset, &tmp)) |
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415 | | - goto out_free_output; |
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416 | | - output[i].min = tmp; |
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417 | | - if (of_property_read_u32_index(np, |
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418 | | - "atmel,pll-clk-output-ranges", |
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419 | | - offset + 1, &tmp)) |
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420 | | - goto out_free_output; |
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421 | | - output[i].max = tmp; |
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422 | | - |
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423 | | - if (num_cells == 2) |
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424 | | - continue; |
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425 | | - |
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426 | | - if (of_property_read_u32_index(np, |
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427 | | - "atmel,pll-clk-output-ranges", |
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428 | | - offset + 2, &tmp)) |
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429 | | - goto out_free_output; |
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430 | | - out[i] = tmp; |
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431 | | - |
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432 | | - if (num_cells == 3) |
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433 | | - continue; |
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434 | | - |
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435 | | - if (of_property_read_u32_index(np, |
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436 | | - "atmel,pll-clk-output-ranges", |
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437 | | - offset + 3, &tmp)) |
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438 | | - goto out_free_output; |
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439 | | - icpll[i] = tmp; |
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440 | | - } |
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441 | | - |
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442 | | - characteristics->input = input; |
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443 | | - characteristics->num_output = num_output; |
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444 | | - characteristics->output = output; |
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445 | | - characteristics->out = out; |
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446 | | - characteristics->icpll = icpll; |
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447 | | - return characteristics; |
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448 | | - |
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449 | | -out_free_output: |
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450 | | - kfree(icpll); |
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451 | | - kfree(out); |
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452 | | - kfree(output); |
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453 | | -out_free_characteristics: |
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454 | | - kfree(characteristics); |
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455 | | - return NULL; |
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456 | | -} |
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457 | | - |
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458 | | -static void __init |
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459 | | -of_at91_clk_pll_setup(struct device_node *np, |
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460 | | - const struct clk_pll_layout *layout) |
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461 | | -{ |
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462 | | - u32 id; |
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463 | | - struct clk_hw *hw; |
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464 | | - struct regmap *regmap; |
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465 | | - const char *parent_name; |
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466 | | - const char *name = np->name; |
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467 | | - struct clk_pll_characteristics *characteristics; |
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468 | | - |
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469 | | - if (of_property_read_u32(np, "reg", &id)) |
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470 | | - return; |
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471 | | - |
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472 | | - parent_name = of_clk_get_parent_name(np, 0); |
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473 | | - |
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474 | | - of_property_read_string(np, "clock-output-names", &name); |
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475 | | - |
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476 | | - regmap = syscon_node_to_regmap(of_get_parent(np)); |
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477 | | - if (IS_ERR(regmap)) |
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478 | | - return; |
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479 | | - |
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480 | | - characteristics = of_at91_clk_pll_get_characteristics(np); |
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481 | | - if (!characteristics) |
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482 | | - return; |
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483 | | - |
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484 | | - hw = at91_clk_register_pll(regmap, name, parent_name, id, layout, |
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485 | | - characteristics); |
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486 | | - if (IS_ERR(hw)) |
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487 | | - goto out_free_characteristics; |
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488 | | - |
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489 | | - of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw); |
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490 | | - return; |
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491 | | - |
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492 | | -out_free_characteristics: |
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493 | | - kfree(characteristics); |
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494 | | -} |
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495 | | - |
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496 | | -static void __init of_at91rm9200_clk_pll_setup(struct device_node *np) |
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497 | | -{ |
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498 | | - of_at91_clk_pll_setup(np, &at91rm9200_pll_layout); |
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499 | | -} |
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500 | | -CLK_OF_DECLARE(at91rm9200_clk_pll, "atmel,at91rm9200-clk-pll", |
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501 | | - of_at91rm9200_clk_pll_setup); |
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502 | | - |
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503 | | -static void __init of_at91sam9g45_clk_pll_setup(struct device_node *np) |
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504 | | -{ |
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505 | | - of_at91_clk_pll_setup(np, &at91sam9g45_pll_layout); |
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506 | | -} |
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507 | | -CLK_OF_DECLARE(at91sam9g45_clk_pll, "atmel,at91sam9g45-clk-pll", |
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508 | | - of_at91sam9g45_clk_pll_setup); |
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509 | | - |
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510 | | -static void __init of_at91sam9g20_clk_pllb_setup(struct device_node *np) |
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511 | | -{ |
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512 | | - of_at91_clk_pll_setup(np, &at91sam9g20_pllb_layout); |
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513 | | -} |
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514 | | -CLK_OF_DECLARE(at91sam9g20_clk_pllb, "atmel,at91sam9g20-clk-pllb", |
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515 | | - of_at91sam9g20_clk_pllb_setup); |
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516 | | - |
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517 | | -static void __init of_sama5d3_clk_pll_setup(struct device_node *np) |
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518 | | -{ |
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519 | | - of_at91_clk_pll_setup(np, &sama5d3_pll_layout); |
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520 | | -} |
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521 | | -CLK_OF_DECLARE(sama5d3_clk_pll, "atmel,sama5d3-clk-pll", |
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522 | | - of_sama5d3_clk_pll_setup); |
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