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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2016 Atmel Corporation, |
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3 | 4 | * Songjun Wu <songjun.wu@atmel.com>, |
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4 | 5 | * Nicolas Ferre <nicolas.ferre@atmel.com> |
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5 | 6 | * Copyright (C) 2017 Free Electrons, |
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6 | 7 | * Quentin Schulz <quentin.schulz@free-electrons.com> |
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7 | | - * |
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8 | | - * This program is free software; you can redistribute it and/or modify |
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9 | | - * it under the terms of the GNU General Public License as published by |
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10 | | - * the Free Software Foundation; either version 2 of the License, or |
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11 | | - * (at your option) any later version. |
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12 | 8 | * |
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13 | 9 | * The Sama5d2 SoC has two audio PLLs (PMC and PAD) that shares the same parent |
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14 | 10 | * (FRAC). FRAC can output between 620 and 700MHz and only multiply the rate of |
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.. | .. |
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32 | 28 | * rate - rate is adjustable. |
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33 | 29 | * clk->rate = parent->rate / (qdaudio * div)) |
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34 | 30 | * parent - fixed parent. No clk_set_parent support |
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35 | | - * |
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36 | 31 | */ |
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37 | 32 | |
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38 | 33 | #include <linux/clk.h> |
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.. | .. |
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42 | 37 | #include <linux/mfd/syscon.h> |
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43 | 38 | #include <linux/regmap.h> |
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44 | 39 | #include <linux/slab.h> |
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| 40 | + |
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| 41 | +#include "pmc.h" |
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45 | 42 | |
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46 | 43 | #define AUDIO_PLL_DIV_FRAC BIT(22) |
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47 | 44 | #define AUDIO_PLL_ND_MAX (AT91_PMC_AUDIO_PLL_ND_MASK >> \ |
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.. | .. |
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338 | 335 | pr_debug("A PLL/PMC: %s, rate = %lu (parent_rate = %lu)\n", __func__, |
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339 | 336 | rate, *parent_rate); |
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340 | 337 | |
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341 | | - for (div = 1; div <= AUDIO_PLL_QDPMC_MAX; div++) { |
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| 338 | + if (!rate) |
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| 339 | + return 0; |
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| 340 | + |
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| 341 | + best_parent_rate = clk_round_rate(pclk->clk, 1); |
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| 342 | + div = max(best_parent_rate / rate, 1UL); |
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| 343 | + for (; div <= AUDIO_PLL_QDPMC_MAX; div++) { |
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342 | 344 | best_parent_rate = clk_round_rate(pclk->clk, rate * div); |
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343 | 345 | tmp_rate = best_parent_rate / div; |
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344 | 346 | tmp_diff = abs(rate - tmp_rate); |
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.. | .. |
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348 | 350 | best_rate = tmp_rate; |
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349 | 351 | best_diff = tmp_diff; |
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350 | 352 | tmp_qd = div; |
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| 353 | + if (!best_diff) |
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| 354 | + break; /* got exact match */ |
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351 | 355 | } |
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352 | 356 | } |
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353 | 357 | |
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.. | .. |
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444 | 448 | .set_rate = clk_audio_pll_pmc_set_rate, |
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445 | 449 | }; |
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446 | 450 | |
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447 | | -static int of_sama5d2_clk_audio_pll_setup(struct device_node *np, |
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448 | | - struct clk_init_data *init, |
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449 | | - struct clk_hw *hw, |
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450 | | - struct regmap **clk_audio_regmap) |
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451 | | -{ |
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452 | | - struct regmap *regmap; |
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453 | | - const char *parent_names[1]; |
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454 | | - int ret; |
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455 | | - |
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456 | | - regmap = syscon_node_to_regmap(of_get_parent(np)); |
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457 | | - if (IS_ERR(regmap)) |
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458 | | - return PTR_ERR(regmap); |
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459 | | - |
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460 | | - init->name = np->name; |
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461 | | - of_clk_parent_fill(np, parent_names, 1); |
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462 | | - init->parent_names = parent_names; |
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463 | | - init->num_parents = 1; |
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464 | | - |
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465 | | - hw->init = init; |
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466 | | - *clk_audio_regmap = regmap; |
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467 | | - |
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468 | | - ret = clk_hw_register(NULL, hw); |
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469 | | - if (ret) |
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470 | | - return ret; |
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471 | | - |
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472 | | - return of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw); |
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473 | | -} |
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474 | | - |
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475 | | -static void __init of_sama5d2_clk_audio_pll_frac_setup(struct device_node *np) |
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| 451 | +struct clk_hw * __init |
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| 452 | +at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name, |
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| 453 | + const char *parent_name) |
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476 | 454 | { |
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477 | 455 | struct clk_audio_frac *frac_ck; |
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478 | 456 | struct clk_init_data init = {}; |
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| 457 | + int ret; |
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479 | 458 | |
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480 | 459 | frac_ck = kzalloc(sizeof(*frac_ck), GFP_KERNEL); |
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481 | 460 | if (!frac_ck) |
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482 | | - return; |
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| 461 | + return ERR_PTR(-ENOMEM); |
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483 | 462 | |
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| 463 | + init.name = name; |
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484 | 464 | init.ops = &audio_pll_frac_ops; |
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| 465 | + init.parent_names = &parent_name; |
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| 466 | + init.num_parents = 1; |
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485 | 467 | init.flags = CLK_SET_RATE_GATE; |
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486 | 468 | |
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487 | | - if (of_sama5d2_clk_audio_pll_setup(np, &init, &frac_ck->hw, |
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488 | | - &frac_ck->regmap)) |
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| 469 | + frac_ck->hw.init = &init; |
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| 470 | + frac_ck->regmap = regmap; |
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| 471 | + |
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| 472 | + ret = clk_hw_register(NULL, &frac_ck->hw); |
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| 473 | + if (ret) { |
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489 | 474 | kfree(frac_ck); |
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| 475 | + return ERR_PTR(ret); |
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| 476 | + } |
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| 477 | + |
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| 478 | + return &frac_ck->hw; |
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490 | 479 | } |
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491 | 480 | |
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492 | | -static void __init of_sama5d2_clk_audio_pll_pad_setup(struct device_node *np) |
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| 481 | +struct clk_hw * __init |
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| 482 | +at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name, |
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| 483 | + const char *parent_name) |
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493 | 484 | { |
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494 | 485 | struct clk_audio_pad *apad_ck; |
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495 | | - struct clk_init_data init = {}; |
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| 486 | + struct clk_init_data init; |
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| 487 | + int ret; |
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496 | 488 | |
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497 | 489 | apad_ck = kzalloc(sizeof(*apad_ck), GFP_KERNEL); |
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498 | 490 | if (!apad_ck) |
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499 | | - return; |
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| 491 | + return ERR_PTR(-ENOMEM); |
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500 | 492 | |
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| 493 | + init.name = name; |
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501 | 494 | init.ops = &audio_pll_pad_ops; |
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| 495 | + init.parent_names = &parent_name; |
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| 496 | + init.num_parents = 1; |
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502 | 497 | init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | |
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503 | 498 | CLK_SET_RATE_PARENT; |
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504 | 499 | |
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505 | | - if (of_sama5d2_clk_audio_pll_setup(np, &init, &apad_ck->hw, |
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506 | | - &apad_ck->regmap)) |
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| 500 | + apad_ck->hw.init = &init; |
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| 501 | + apad_ck->regmap = regmap; |
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| 502 | + |
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| 503 | + ret = clk_hw_register(NULL, &apad_ck->hw); |
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| 504 | + if (ret) { |
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507 | 505 | kfree(apad_ck); |
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| 506 | + return ERR_PTR(ret); |
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| 507 | + } |
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| 508 | + |
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| 509 | + return &apad_ck->hw; |
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508 | 510 | } |
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509 | 511 | |
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510 | | -static void __init of_sama5d2_clk_audio_pll_pmc_setup(struct device_node *np) |
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| 512 | +struct clk_hw * __init |
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| 513 | +at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name, |
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| 514 | + const char *parent_name) |
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511 | 515 | { |
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512 | 516 | struct clk_audio_pmc *apmc_ck; |
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513 | | - struct clk_init_data init = {}; |
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| 517 | + struct clk_init_data init; |
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| 518 | + int ret; |
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514 | 519 | |
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515 | 520 | apmc_ck = kzalloc(sizeof(*apmc_ck), GFP_KERNEL); |
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516 | 521 | if (!apmc_ck) |
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517 | | - return; |
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| 522 | + return ERR_PTR(-ENOMEM); |
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518 | 523 | |
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| 524 | + init.name = name; |
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519 | 525 | init.ops = &audio_pll_pmc_ops; |
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| 526 | + init.parent_names = &parent_name; |
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| 527 | + init.num_parents = 1; |
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520 | 528 | init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | |
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521 | 529 | CLK_SET_RATE_PARENT; |
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522 | 530 | |
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523 | | - if (of_sama5d2_clk_audio_pll_setup(np, &init, &apmc_ck->hw, |
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524 | | - &apmc_ck->regmap)) |
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525 | | - kfree(apmc_ck); |
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526 | | -} |
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| 531 | + apmc_ck->hw.init = &init; |
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| 532 | + apmc_ck->regmap = regmap; |
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527 | 533 | |
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528 | | -CLK_OF_DECLARE(of_sama5d2_clk_audio_pll_frac_setup, |
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529 | | - "atmel,sama5d2-clk-audio-pll-frac", |
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530 | | - of_sama5d2_clk_audio_pll_frac_setup); |
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531 | | -CLK_OF_DECLARE(of_sama5d2_clk_audio_pll_pad_setup, |
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532 | | - "atmel,sama5d2-clk-audio-pll-pad", |
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533 | | - of_sama5d2_clk_audio_pll_pad_setup); |
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534 | | -CLK_OF_DECLARE(of_sama5d2_clk_audio_pll_pmc_setup, |
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535 | | - "atmel,sama5d2-clk-audio-pll-pmc", |
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536 | | - of_sama5d2_clk_audio_pll_pmc_setup); |
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| 534 | + ret = clk_hw_register(NULL, &apmc_ck->hw); |
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| 535 | + if (ret) { |
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| 536 | + kfree(apmc_ck); |
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| 537 | + return ERR_PTR(ret); |
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| 538 | + } |
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| 539 | + |
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| 540 | + return &apmc_ck->hw; |
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| 541 | +} |
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