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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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1 | 2 | /* |
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2 | 3 | * mtip32xx.h - Header file for the P320 SSD Block Driver |
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3 | 4 | * Copyright (C) 2011 Micron Technology, Inc. |
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.. | .. |
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5 | 6 | * Portions of this code were derived from works subjected to the |
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6 | 7 | * following copyright: |
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7 | 8 | * Copyright (C) 2009 Integrated Device Technology, Inc. |
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8 | | - * |
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9 | | - * This program is free software; you can redistribute it and/or modify |
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10 | | - * it under the terms of the GNU General Public License as published by |
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11 | | - * the Free Software Foundation; either version 2 of the License, or |
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12 | | - * (at your option) any later version. |
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13 | | - * |
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14 | | - * This program is distributed in the hope that it will be useful, |
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15 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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17 | | - * GNU General Public License for more details. |
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18 | | - * |
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19 | 9 | */ |
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20 | 10 | |
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21 | 11 | #ifndef __MTIP32XX_H__ |
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.. | .. |
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126 | 116 | |
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127 | 117 | #define MTIP_DFS_MAX_BUF_SIZE 1024 |
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128 | 118 | |
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129 | | -#define __force_bit2int (unsigned int __force) |
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130 | | - |
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131 | 119 | enum { |
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132 | 120 | /* below are bit numbers in 'flags' defined in mtip_port */ |
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133 | 121 | MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */ |
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.. | .. |
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174 | 162 | |
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175 | 163 | struct smart_attr { |
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176 | 164 | u8 attr_id; |
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177 | | - u16 flags; |
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| 165 | + __le16 flags; |
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178 | 166 | u8 cur; |
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179 | 167 | u8 worst; |
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180 | | - u32 data; |
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| 168 | + __le32 data; |
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181 | 169 | u8 res[3]; |
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182 | 170 | } __packed; |
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183 | 171 | |
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.. | .. |
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194 | 182 | struct mtip_work *w = (struct mtip_work *) work; \ |
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195 | 183 | mtip_workq_sdbfx(w->port, group, w->completed); \ |
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196 | 184 | } |
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197 | | - |
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198 | | -#define MTIP_TRIM_TIMEOUT_MS 240000 |
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199 | | -#define MTIP_MAX_TRIM_ENTRIES 8 |
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200 | | -#define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8 |
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201 | | - |
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202 | | -struct mtip_trim_entry { |
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203 | | - u32 lba; /* starting lba of region */ |
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204 | | - u16 rsvd; /* unused */ |
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205 | | - u16 range; /* # of 512b blocks to trim */ |
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206 | | -} __packed; |
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207 | | - |
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208 | | -struct mtip_trim { |
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209 | | - /* Array of regions to trim */ |
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210 | | - struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES]; |
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211 | | -} __packed; |
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212 | 185 | |
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213 | 186 | /* Register Frame Information Structure (FIS), host to device. */ |
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214 | 187 | struct host_to_dev_fis { |
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.. | .. |
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278 | 251 | * - Bit 5 Unused in this implementation. |
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279 | 252 | * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes). |
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280 | 253 | */ |
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281 | | - unsigned int opts; |
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| 254 | + __le32 opts; |
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282 | 255 | /* This field is unsed when using NCQ. */ |
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283 | 256 | union { |
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284 | | - unsigned int byte_count; |
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285 | | - unsigned int status; |
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| 257 | + __le32 byte_count; |
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| 258 | + __le32 status; |
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286 | 259 | }; |
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287 | 260 | /* |
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288 | 261 | * Lower 32 bits of the command table address associated with this |
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289 | 262 | * header. The command table addresses must be 128 byte aligned. |
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290 | 263 | */ |
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291 | | - unsigned int ctba; |
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| 264 | + __le32 ctba; |
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292 | 265 | /* |
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293 | 266 | * If 64 bit addressing is used this field is the upper 32 bits |
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294 | 267 | * of the command table address associated with this command. |
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295 | 268 | */ |
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296 | | - unsigned int ctbau; |
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| 269 | + __le32 ctbau; |
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297 | 270 | /* Reserved and unused. */ |
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298 | | - unsigned int res[4]; |
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| 271 | + u32 res[4]; |
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299 | 272 | }; |
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300 | 273 | |
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301 | 274 | /* Command scatter gather structure (PRD). */ |
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.. | .. |
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305 | 278 | * address must be 8 byte aligned signified by bits 2:0 being |
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306 | 279 | * set to 0. |
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307 | 280 | */ |
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308 | | - unsigned int dba; |
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| 281 | + __le32 dba; |
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309 | 282 | /* |
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310 | 283 | * When 64 bit addressing is used this field is the upper |
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311 | 284 | * 32 bits of the data buffer address. |
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312 | 285 | */ |
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313 | | - unsigned int dba_upper; |
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| 286 | + __le32 dba_upper; |
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314 | 287 | /* Unused. */ |
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315 | | - unsigned int reserved; |
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| 288 | + __le32 reserved; |
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316 | 289 | /* |
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317 | 290 | * Bit 31: interrupt when this data block has been transferred. |
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318 | 291 | * Bits 30..22: reserved |
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319 | 292 | * Bits 21..0: byte count (minus 1). For P320 the byte count must be |
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320 | 293 | * 8 byte aligned signified by bits 2:0 being set to 1. |
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321 | 294 | */ |
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322 | | - unsigned int info; |
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| 295 | + __le32 info; |
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323 | 296 | }; |
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324 | 297 | struct mtip_port; |
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325 | 298 | |
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| 299 | +struct mtip_int_cmd; |
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| 300 | + |
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326 | 301 | /* Structure used to describe a command. */ |
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327 | 302 | struct mtip_cmd { |
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328 | | - |
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329 | | - struct mtip_cmd_hdr *command_header; /* ptr to command header entry */ |
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330 | | - |
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331 | | - dma_addr_t command_header_dma; /* corresponding physical address */ |
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332 | | - |
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333 | 303 | void *command; /* ptr to command table entry */ |
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334 | 304 | |
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335 | 305 | dma_addr_t command_dma; /* corresponding physical address */ |
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.. | .. |
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338 | 308 | |
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339 | 309 | int unaligned; /* command is unaligned on 4k boundary */ |
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340 | 310 | |
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341 | | - struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ |
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| 311 | + union { |
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| 312 | + struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ |
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| 313 | + struct mtip_int_cmd *icmd; |
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| 314 | + }; |
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342 | 315 | |
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343 | 316 | int retries; /* The number of retries left for this command. */ |
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344 | 317 | |
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.. | .. |
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435 | 408 | */ |
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436 | 409 | unsigned long ic_pause_timer; |
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437 | 410 | |
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438 | | - /* Semaphore to control queue depth of unaligned IOs */ |
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439 | | - struct semaphore cmd_slot_unal; |
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| 411 | + /* Counter to control queue depth of unaligned IOs */ |
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| 412 | + atomic_t cmd_slot_unal; |
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440 | 413 | |
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441 | 414 | /* Spinlock for working around command-issue bug. */ |
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442 | 415 | spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS]; |
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.. | .. |
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475 | 448 | struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ |
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476 | 449 | |
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477 | 450 | struct dentry *dfs_node; |
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478 | | - |
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479 | | - bool trim_supp; /* flag indicating trim support */ |
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480 | 451 | |
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481 | 452 | bool sr; |
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482 | 453 | |
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