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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/x86/platform/uv/uv_nmi.c
....@@ -1,22 +1,10 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * SGI NMI support routines
34  *
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- *  This program is free software; you can redistribute it and/or modify
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- *  it under the terms of the GNU General Public License as published by
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- *  the Free Software Foundation; either version 2 of the License, or
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- *  (at your option) any later version.
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- *
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- *  This program is distributed in the hope that it will be useful,
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- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- *  GNU General Public License for more details.
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- *
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- *  You should have received a copy of the GNU General Public License
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- *  along with this program; if not, write to the Free Software
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- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
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- *
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- *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
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- *  Copyright (c) Mike Travis
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+ * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
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+ * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
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+ * Copyright (c) Mike Travis
208  */
219 
2210 #include <linux/cpu.h>
....@@ -66,6 +54,19 @@
6654 static struct uv_hub_nmi_s **uv_hub_nmi_list;
6755 
6856 DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
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+
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+/* Newer SMM NMI handler, not present in all systems */
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+static unsigned long uvh_nmi_mmrx;		/* UVH_EVENT_OCCURRED0/1 */
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+static unsigned long uvh_nmi_mmrx_clear;	/* UVH_EVENT_OCCURRED0/1_ALIAS */
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+static int uvh_nmi_mmrx_shift;			/* UVH_EVENT_OCCURRED0/1_EXTIO_INT0_SHFT */
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+static char *uvh_nmi_mmrx_type;			/* "EXTIO_INT0" */
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+
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+/* Non-zero indicates newer SMM NMI handler present */
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+static unsigned long uvh_nmi_mmrx_supported;	/* UVH_EXTIO_INT0_BROADCAST */
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+
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+/* Indicates to BIOS that we want to use the newer SMM NMI handler */
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+static unsigned long uvh_nmi_mmrx_req;		/* UVH_BIOS_KERNEL_MMR_ALIAS_2 */
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+static int uvh_nmi_mmrx_req_shift;		/* 62 */
6970 
7071 /* UV hubless values */
7172 #define NMI_CONTROL_PORT	0x70
....@@ -240,13 +241,41 @@
240241 /* Setup which NMI support is present in system */
241242 static void uv_nmi_setup_mmrs(void)
242243 {
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-	if (uv_read_local_mmr(UVH_NMI_MMRX_SUPPORTED)) {
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-		uv_write_local_mmr(UVH_NMI_MMRX_REQ,
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-					1UL << UVH_NMI_MMRX_REQ_SHIFT);
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-		nmi_mmr = UVH_NMI_MMRX;
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-		nmi_mmr_clear = UVH_NMI_MMRX_CLEAR;
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-		nmi_mmr_pending = 1UL << UVH_NMI_MMRX_SHIFT;
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-		pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMRX_TYPE);
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+	/* First determine arch specific MMRs to handshake with BIOS */
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+	if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) {
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+		uvh_nmi_mmrx = UVH_EVENT_OCCURRED0;
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+		uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS;
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+		uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT;
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+		uvh_nmi_mmrx_type = "OCRD0-EXTIO_INT0";
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+
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+		uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
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+		uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
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+		uvh_nmi_mmrx_req_shift = 62;
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+
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+	} else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) {
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+		uvh_nmi_mmrx = UVH_EVENT_OCCURRED1;
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+		uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS;
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+		uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT;
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+		uvh_nmi_mmrx_type = "OCRD1-EXTIO_INT0";
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+
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+		uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST;
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+		uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2;
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+		uvh_nmi_mmrx_req_shift = 62;
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+
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+	} else {
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+		pr_err("UV:%s:cannot find EVENT_OCCURRED*_EXTIO_INT0\n",
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+			__func__);
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+		return;
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+	}
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+
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+	/* Then find out if new NMI is supported */
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+	if (likely(uv_read_local_mmr(uvh_nmi_mmrx_supported))) {
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+		uv_write_local_mmr(uvh_nmi_mmrx_req,
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+					1UL << uvh_nmi_mmrx_req_shift);
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+		nmi_mmr = uvh_nmi_mmrx;
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+		nmi_mmr_clear = uvh_nmi_mmrx_clear;
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+		nmi_mmr_pending = 1UL << uvh_nmi_mmrx_shift;
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+		pr_info("UV: SMI NMI support: %s\n", uvh_nmi_mmrx_type);
250279 	} else {
251280 		nmi_mmr = UVH_NMI_MMR;
252281 		nmi_mmr_clear = UVH_NMI_MMR_CLEAR;
....@@ -560,7 +589,7 @@
560589 	}
561590 }
562591 
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-/* Ping non-responding CPU's attemping to force them into the NMI handler */
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+/* Ping non-responding CPU's attempting to force them into the NMI handler */
564593 static void uv_nmi_nr_cpus_ping(void)
565594 {
566595 	int cpu;
....@@ -1062,5 +1091,5 @@
10621091 	/* Ensure NMI enabled in Processor Interface Reg: */
10631092 	uv_reassert_nmi();
10641093 	uv_register_nmi_notifier();
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-	pr_info("UV: Hubless NMI enabled\n");
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+	pr_info("UV: PCH NMI enabled\n");
10661095 }