add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/x86/kernel/cpu/centaur.c
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@@ -3,6 +3,7 @@
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 #include <linux/sched.h>
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 #include <linux/sched/clock.h>
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5
 
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+#include <asm/cpu.h>
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 #include <asm/cpufeature.h>
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 #include <asm/e820/api.h>
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 #include <asm/mtrr.h>
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@@ -17,13 +18,6 @@
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 #define RNG_PRESENT	(1 << 2)
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 #define RNG_ENABLED	(1 << 3)
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 #define RNG_ENABLE	(1 << 6)	/* MSR_VIA_RNG */
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-
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-#define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW	0x00200000
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-#define X86_VMX_FEATURE_PROC_CTLS_VNMI		0x00400000
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-#define X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS	0x80000000
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-#define X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC	0x00000001
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-#define X86_VMX_FEATURE_PROC_CTLS2_EPT		0x00000002
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-#define X86_VMX_FEATURE_PROC_CTLS2_VPID		0x00000020
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21
 
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 static void init_c3(struct cpuinfo_x86 *c)
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 {
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@@ -72,7 +66,8 @@
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 		set_cpu_cap(c, X86_FEATURE_REP_GOOD);
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 	}
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68
 
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-	cpu_detect_cache_sizes(c);
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+	if (c->x86 >= 7)
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+		set_cpu_cap(c, X86_FEATURE_REP_GOOD);
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 }
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72
 
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 enum {
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@@ -98,49 +93,21 @@
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93
 
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 static void early_init_centaur(struct cpuinfo_x86 *c)
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 {
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-	switch (c->x86) {
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 #ifdef CONFIG_X86_32
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-	case 5:
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-		/* Emulate MTRRs using Centaur's MCR. */
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+	/* Emulate MTRRs using Centaur's MCR. */
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+	if (c->x86 == 5)
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 		set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);
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-		break;
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 #endif
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-	case 6:
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-		if (c->x86_model >= 0xf)
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-			set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
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-		break;
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-	}
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+	if ((c->x86 == 6 && c->x86_model >= 0xf) ||
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+	    (c->x86 >= 7))
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+		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
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+
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 #ifdef CONFIG_X86_64
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 	set_cpu_cap(c, X86_FEATURE_SYSENTER32);
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 #endif
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 	if (c->x86_power & (1 << 8)) {
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 		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
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 		set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
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-	}
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-}
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-
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-static void centaur_detect_vmx_virtcap(struct cpuinfo_x86 *c)
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-{
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-	u32 vmx_msr_low, vmx_msr_high, msr_ctl, msr_ctl2;
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-
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-	rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high);
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-	msr_ctl = vmx_msr_high | vmx_msr_low;
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-
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-	if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW)
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-		set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
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-	if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_VNMI)
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-		set_cpu_cap(c, X86_FEATURE_VNMI);
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-	if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS) {
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-		rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
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-		      vmx_msr_low, vmx_msr_high);
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-		msr_ctl2 = vmx_msr_high | vmx_msr_low;
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-		if ((msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC) &&
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-		    (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW))
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-			set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
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-		if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_EPT)
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-			set_cpu_cap(c, X86_FEATURE_EPT);
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-		if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VPID)
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-			set_cpu_cap(c, X86_FEATURE_VPID);
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111
 	}
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 }
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..
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@@ -178,9 +145,8 @@
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 			set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
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 	}
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147
 
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-	switch (c->x86) {
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 #ifdef CONFIG_X86_32
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-	case 5:
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+	if (c->x86 == 5) {
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 		switch (c->x86_model) {
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 		case 4:
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 			name = "C6";
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@@ -240,18 +206,15 @@
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 			c->x86_cache_size = (cc>>24)+(dd>>24);
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 		}
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 		sprintf(c->x86_model_id, "WinChip %s", name);
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-		break;
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-#endif
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-	case 6:
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-		init_c3(c);
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-		break;
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 	}
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+#endif
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+	if (c->x86 == 6 || c->x86 >= 7)
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+		init_c3(c);
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 #ifdef CONFIG_X86_64
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 	set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
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215
 #endif
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216
 
253
-	if (cpu_has(c, X86_FEATURE_VMX))
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-		centaur_detect_vmx_virtcap(c);
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+	init_ia32_feat_ctl(c);
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218
 }
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219
 
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 #ifdef CONFIG_X86_32