hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/powerpc/kernel/dt_cpu_ftrs.c
....@@ -1,6 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright 2017, Nicholas Piggin, IBM Corporation
3
- * Licensed under GPLv2.
44 */
55
66 #define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
....@@ -17,6 +17,7 @@
1717
1818 #include <asm/cputable.h>
1919 #include <asm/dt_cpu_ftrs.h>
20
+#include <asm/mce.h>
2021 #include <asm/mmu.h>
2122 #include <asm/oprofile_impl.h>
2223 #include <asm/prom.h>
....@@ -24,8 +25,8 @@
2425
2526
2627 /* Device-tree visible constants follow */
27
-#define ISA_V2_07B 2070
2828 #define ISA_V3_0B 3000
29
+#define ISA_V3_1 3100
2930
3031 #define USABLE_PR (1U << 0)
3132 #define USABLE_OS (1U << 1)
....@@ -64,9 +65,6 @@
6465 * Set up the base CPU
6566 */
6667
67
-extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
68
-extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
69
-
7068 static int hv_mode;
7169
7270 static struct {
....@@ -74,6 +72,7 @@
7472 u64 lpcr_clear;
7573 u64 hfscr;
7674 u64 fscr;
75
+ u64 pcr;
7776 } system_registers;
7877
7978 static void (*init_pmu_registers)(void);
....@@ -101,7 +100,7 @@
101100 if (hv_mode) {
102101 mtspr(SPRN_LPID, 0);
103102 mtspr(SPRN_HFSCR, system_registers.hfscr);
104
- mtspr(SPRN_PCR, 0);
103
+ mtspr(SPRN_PCR, system_registers.pcr);
105104 }
106105 mtspr(SPRN_FSCR, system_registers.fscr);
107106
....@@ -139,11 +138,11 @@
139138 /* Initialize the base environment -- clear FSCR/HFSCR. */
140139 hv_mode = !!(mfmsr() & MSR_HV);
141140 if (hv_mode) {
142
- /* CPU_FTR_HVMODE is used early in PACA setup */
143141 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
144142 mtspr(SPRN_HFSCR, 0);
145143 }
146144 mtspr(SPRN_FSCR, 0);
145
+ mtspr(SPRN_PCR, PCR_MASK);
147146
148147 /*
149148 * LPCR does not get cleared, to match behaviour with secondaries
....@@ -335,6 +334,7 @@
335334 #ifdef CONFIG_PPC_RADIX_MMU
336335 cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
337336 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
337
+ cur_cpu_spec->mmu_features |= MMU_FTR_GTSE;
338338 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
339339
340340 return 1;
....@@ -444,6 +444,40 @@
444444 cur_cpu_spec->num_pmcs = 6;
445445 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
446446 cur_cpu_spec->oprofile_cpu_type = "ppc64/power9";
447
+
448
+ return 1;
449
+}
450
+
451
+static void init_pmu_power10(void)
452
+{
453
+ init_pmu_power9();
454
+
455
+ mtspr(SPRN_MMCR3, 0);
456
+ mtspr(SPRN_MMCRA, MMCRA_BHRB_DISABLE);
457
+ mtspr(SPRN_MMCR0, MMCR0_PMCCEXT);
458
+}
459
+
460
+static int __init feat_enable_pmu_power10(struct dt_cpu_feature *f)
461
+{
462
+ hfscr_pmu_enable();
463
+
464
+ init_pmu_power10();
465
+ init_pmu_registers = init_pmu_power10;
466
+
467
+ cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
468
+ cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
469
+
470
+ cur_cpu_spec->num_pmcs = 6;
471
+ cur_cpu_spec->pmc_type = PPC_PMC_IBM;
472
+ cur_cpu_spec->oprofile_cpu_type = "ppc64/power10";
473
+
474
+ return 1;
475
+}
476
+
477
+static int __init feat_enable_mce_power10(struct dt_cpu_feature *f)
478
+{
479
+ cur_cpu_spec->platform = "power10";
480
+ cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;
447481
448482 return 1;
449483 }
....@@ -560,6 +594,18 @@
560594 return 1;
561595 }
562596
597
+static int __init feat_enable_mma(struct dt_cpu_feature *f)
598
+{
599
+ u64 pcr;
600
+
601
+ feat_enable(f);
602
+ pcr = mfspr(SPRN_PCR);
603
+ pcr &= ~PCR_MMA_DIS;
604
+ mtspr(SPRN_PCR, pcr);
605
+
606
+ return 1;
607
+}
608
+
563609 struct dt_cpu_feature_match {
564610 const char *name;
565611 int (*enable)(struct dt_cpu_feature *f);
....@@ -573,6 +619,7 @@
573619 {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
574620 {"smt", feat_enable_smt, 0},
575621 {"interrupt-facilities", feat_enable, 0},
622
+ {"system-call-vectored", feat_enable, 0},
576623 {"timer-facilities", feat_enable, 0},
577624 {"timer-facilities-v3", feat_enable, 0},
578625 {"debug-facilities", feat_enable, 0},
....@@ -624,7 +671,9 @@
624671 {"group-start-register", feat_enable, 0},
625672 {"pc-relative-addressing", feat_enable, 0},
626673 {"machine-check-power9", feat_enable_mce_power9, 0},
674
+ {"machine-check-power10", feat_enable_mce_power10, 0},
627675 {"performance-monitor-power9", feat_enable_pmu_power9, 0},
676
+ {"performance-monitor-power10", feat_enable_pmu_power10, 0},
628677 {"event-based-branch-v3", feat_enable, 0},
629678 {"random-number-generator", feat_enable, 0},
630679 {"system-call-vectored", feat_disable, 0},
....@@ -633,6 +682,9 @@
633682 {"vector-binary128", feat_enable, 0},
634683 {"vector-binary16", feat_enable, 0},
635684 {"wait-v3", feat_enable, 0},
685
+ {"prefix-instructions", feat_enable, 0},
686
+ {"matrix-multiply-assist", feat_enable_mma, 0},
687
+ {"debug-facilities-v31", feat_enable, CPU_FTR_DAWR1},
636688 };
637689
638690 static bool __initdata using_dt_cpu_ftrs;
....@@ -658,9 +710,14 @@
658710 {
659711 pr_info("setup for ISA %d\n", isa);
660712
661
- if (isa >= 3000) {
713
+ if (isa >= ISA_V3_0B) {
662714 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
663715 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
716
+ }
717
+
718
+ if (isa >= ISA_V3_1) {
719
+ cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_31;
720
+ cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_1;
664721 }
665722 }
666723
....@@ -734,17 +791,20 @@
734791 /*
735792 * Not all quirks can be derived from the cpufeatures device tree.
736793 */
737
- if ((version & 0xffffefff) == 0x004e0200)
738
- ; /* DD2.0 has no feature flag */
739
- else if ((version & 0xffffefff) == 0x004e0201)
794
+ if ((version & 0xffffefff) == 0x004e0200) {
795
+ /* DD2.0 has no feature flag */
796
+ cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
797
+ } else if ((version & 0xffffefff) == 0x004e0201) {
740798 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
741
- else if ((version & 0xffffefff) == 0x004e0202) {
799
+ cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
800
+ } else if ((version & 0xffffefff) == 0x004e0202) {
742801 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
743802 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
744803 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
745
- } else if ((version & 0xffff0000) == 0x004e0000)
804
+ } else if ((version & 0xffff0000) == 0x004e0000) {
746805 /* DD2.1 and up have DD2_1 */
747806 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
807
+ }
748808
749809 if ((version & 0xffff0000) == 0x004e0000) {
750810 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
....@@ -752,12 +812,6 @@
752812 }
753813
754814 update_tlbie_feature_flag(version);
755
- /*
756
- * PKEY was not in the initial base or feature node
757
- * specification, but it should become optional in the next
758
- * cpu feature version sequence.
759
- */
760
- cur_cpu_spec->cpu_features |= CPU_FTR_PKEY;
761815 }
762816
763817 static void __init cpufeatures_setup_finished(void)
....@@ -775,6 +829,7 @@
775829 system_registers.lpcr = mfspr(SPRN_LPCR);
776830 system_registers.hfscr = mfspr(SPRN_HFSCR);
777831 system_registers.fscr = mfspr(SPRN_FSCR);
832
+ system_registers.pcr = mfspr(SPRN_PCR);
778833
779834 pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
780835 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
....@@ -846,7 +901,6 @@
846901 int len;
847902
848903 f = &dt_cpu_features[i];
849
- memset(f, 0, sizeof(struct dt_cpu_feature));
850904
851905 f->node = node;
852906
....@@ -1041,9 +1095,12 @@
10411095 /* Count and allocate space for cpu features */
10421096 of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
10431097 &nr_dt_cpu_features);
1044
- dt_cpu_features = __va(
1045
- memblock_alloc(sizeof(struct dt_cpu_feature)*
1046
- nr_dt_cpu_features, PAGE_SIZE));
1098
+ dt_cpu_features = memblock_alloc(sizeof(struct dt_cpu_feature) * nr_dt_cpu_features, PAGE_SIZE);
1099
+ if (!dt_cpu_features)
1100
+ panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
1101
+ __func__,
1102
+ sizeof(struct dt_cpu_feature) * nr_dt_cpu_features,
1103
+ PAGE_SIZE);
10471104
10481105 cpufeatures_setup_start(isa);
10491106