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31 | 31 | #define _PAGE_WRITETHRU 0x00400 /* H: W bit */ |
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32 | 32 | #define _PAGE_SPECIAL 0x00800 /* S: Special page */ |
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33 | 33 | |
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| 34 | +#define _PAGE_KERNEL_RO 0 |
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| 35 | +#define _PAGE_KERNEL_ROX _PAGE_EXEC |
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| 36 | +#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW) |
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| 37 | +#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC) |
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| 38 | + |
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| 39 | +/* No page size encoding in the linux PTE */ |
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| 40 | +#define _PAGE_PSIZE 0 |
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| 41 | + |
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34 | 42 | #define _PMD_PRESENT 0 |
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35 | 43 | #define _PMD_PRESENT_MASK (PAGE_MASK) |
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36 | 44 | #define _PMD_BAD (~PAGE_MASK) |
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| 45 | +#define _PMD_USER 0 |
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| 46 | + |
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| 47 | +#define _PTE_NONE_MASK 0 |
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37 | 48 | |
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38 | 49 | #define PTE_WIMGE_SHIFT (6) |
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39 | 50 | |
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| 51 | +/* |
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| 52 | + * We define 2 sets of base prot bits, one for basic pages (ie, |
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| 53 | + * cacheable kernel and user pages) and one for non cacheable |
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| 54 | + * pages. We always set _PAGE_COHERENT when SMP is enabled or |
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| 55 | + * the processor might need it for DMA coherency. |
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| 56 | + */ |
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| 57 | +#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED) |
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| 58 | +#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC) |
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| 59 | +#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT) |
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| 60 | +#else |
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| 61 | +#define _PAGE_BASE (_PAGE_BASE_NC) |
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| 62 | +#endif |
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| 63 | + |
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| 64 | +/* Permission masks used to generate the __P and __S table */ |
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| 65 | +#define PAGE_NONE __pgprot(_PAGE_BASE) |
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| 66 | +#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) |
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| 67 | +#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC) |
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| 68 | +#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) |
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| 69 | +#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) |
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| 70 | +#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) |
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| 71 | +#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) |
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| 72 | + |
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40 | 73 | #endif /* __KERNEL__ */ |
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41 | 74 | #endif /* _ASM_POWERPC_NOHASH_32_PTE_FSL_BOOKE_H */ |
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