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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/powerpc/include/asm/exception-64s.h
....@@ -1,3 +1,4 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 #ifndef _ASM_POWERPC_EXCEPTION_H
23 #define _ASM_POWERPC_EXCEPTION_H
34 /*
....@@ -18,11 +19,6 @@
1819  *
1920  *  This file contains the low-level support and setup for the
2021  *  PowerPC-64 platform, including trap and interrupt dispatch.
21
- *
22
- *  This program is free software; you can redistribute it and/or
23
- *  modify it under the terms of the GNU General Public License
24
- *  as published by the Free Software Foundation; either version
25
- *  2 of the License, or (at your option) any later version.
2622  */
2723 /*
2824  * The following macros define the code that appears as
....@@ -34,46 +30,17 @@
3430  * exception handlers (including pSeries LPAR) and iSeries LPAR
3531  * implementations as possible.
3632  */
37
-#include <asm/head-64.h>
3833 #include <asm/feature-fixups.h>
3934 
40
-/* PACA save area offsets (exgen, exmc, etc) */
41
-#define EX_R9		0
42
-#define EX_R10		8
43
-#define EX_R11		16
44
-#define EX_R12		24
45
-#define EX_R13		32
46
-#define EX_DAR		40
47
-#define EX_DSISR	48
48
-#define EX_CCR		52
49
-#define EX_CFAR		56
50
-#define EX_PPR		64
51
-#if defined(CONFIG_RELOCATABLE)
52
-#define EX_CTR		72
53
-#define EX_SIZE		10	/* size in u64 units */
54
-#else
55
-#define EX_SIZE		9	/* size in u64 units */
56
-#endif
35
+/* PACA save area size in u64 units (exgen, exmc, etc) */
36
+#define EX_SIZE		10
5737 
5838 /*
5939  * maximum recursive depth of MCE exceptions
6040  */
6141 #define MAX_MCE_DEPTH	4
6242 
63
-/*
64
- * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR
65
- * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole
66
- * in the save area so it's not necessary to overlap them. Could be used
67
- * for future savings though if another 4 byte register was to be saved.
68
- */
69
-#define EX_LR		EX_DAR
70
-
71
-/*
72
- * EX_R3 is only used by the bad_stack handler. bad_stack reloads and
73
- * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap
74
- * with EX_DAR.
75
- */
76
-#define EX_R3		EX_DAR
43
+#ifdef __ASSEMBLY__
7744 
7845 #define STF_ENTRY_BARRIER_SLOT						\
7946 	STF_ENTRY_BARRIER_FIXUP_SECTION;				\
....@@ -96,6 +63,12 @@
9663 	nop;								\
9764 	nop;
9865 
66
+#define SCV_ENTRY_FLUSH_SLOT						\
67
+	SCV_ENTRY_FLUSH_FIXUP_SECTION;					\
68
+	nop;								\
69
+	nop;								\
70
+	nop;
71
+
9972 /*
10073  * r10 must be free to use, r13 must be paca
10174  */
....@@ -104,10 +77,25 @@
10477 	ENTRY_FLUSH_SLOT
10578 
10679 /*
80
+ * r10, ctr must be free to use, r13 must be paca
81
+ */
82
+#define SCV_INTERRUPT_TO_KERNEL						\
83
+	STF_ENTRY_BARRIER_SLOT;						\
84
+	SCV_ENTRY_FLUSH_SLOT
85
+
86
+/*
10787  * Macros for annotating the expected destination of (h)rfid
10888  *
10989  * The nop instructions allow us to insert one or more instructions to flush the
11090  * L1-D cache when returning to userspace or a guest.
91
+ *
92
+ * powerpc relies on return from interrupt/syscall being context synchronising
93
+ * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE
94
+ * without additional synchronisation instructions.
95
+ *
96
+ * soft-masked interrupt replay does not include a context-synchronising rfid,
97
+ * but those always return to kernel, the sync is only required when returning
98
+ * to user.
11199  */
112100 #define RFI_FLUSH_SLOT							\
113101 	RFI_FLUSH_FIXUP_SECTION;					\
....@@ -163,587 +151,15 @@
163151 	hrfid;								\
164152 	b	hrfi_flush_fallback
165153 
166
-#ifdef CONFIG_RELOCATABLE
167
-#define __EXCEPTION_PROLOG_2_RELON(label, h)				\
168
-	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
169
-	LOAD_HANDLER(r12,label);					\
170
-	mtctr	r12;							\
171
-	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
172
-	li	r10,MSR_RI;						\
173
-	mtmsrd 	r10,1;			/* Set RI (EE=0) */		\
174
-	bctr;
175
-#else
176
-/* If not relocatable, we can jump directly -- and save messing with LR */
177
-#define __EXCEPTION_PROLOG_2_RELON(label, h)				\
178
-	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
179
-	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
180
-	li	r10,MSR_RI;						\
181
-	mtmsrd 	r10,1;			/* Set RI (EE=0) */		\
182
-	b	label;
183
-#endif
184
-#define EXCEPTION_PROLOG_2_RELON(label, h)				\
185
-	__EXCEPTION_PROLOG_2_RELON(label, h)
154
+#define RFSCV_TO_USER							\
155
+	STF_EXIT_BARRIER_SLOT;						\
156
+	RFI_FLUSH_SLOT;							\
157
+	RFSCV;								\
158
+	b	rfscv_flush_fallback
186159 
187
-/*
188
- * As EXCEPTION_PROLOG(), except we've already got relocation on so no need to
189
- * rfid. Save LR in case we're CONFIG_RELOCATABLE, in which case
190
- * EXCEPTION_PROLOG_2_RELON will be using LR.
191
- */
192
-#define EXCEPTION_RELON_PROLOG(area, label, h, extra, vec)		\
193
-	SET_SCRATCH0(r13);		/* save r13 */			\
194
-	EXCEPTION_PROLOG_0(area);					\
195
-	EXCEPTION_PROLOG_1(area, extra, vec);				\
196
-	EXCEPTION_PROLOG_2_RELON(label, h)
197
-
198
-/*
199
- * We're short on space and time in the exception prolog, so we can't
200
- * use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
201
- * Instead we get the base of the kernel from paca->kernelbase and or in the low
202
- * part of label. This requires that the label be within 64KB of kernelbase, and
203
- * that kernelbase be 64K aligned.
204
- */
205
-#define LOAD_HANDLER(reg, label)					\
206
-	ld	reg,PACAKBASE(r13);	/* get high part of &label */	\
207
-	ori	reg,reg,FIXED_SYMBOL_ABS_ADDR(label);
208
-
209
-#define __LOAD_HANDLER(reg, label)					\
210
-	ld	reg,PACAKBASE(r13);					\
211
-	ori	reg,reg,(ABS_ADDR(label))@l;
212
-
213
-/*
214
- * Branches from unrelocated code (e.g., interrupts) to labels outside
215
- * head-y require >64K offsets.
216
- */
217
-#define __LOAD_FAR_HANDLER(reg, label)					\
218
-	ld	reg,PACAKBASE(r13);					\
219
-	ori	reg,reg,(ABS_ADDR(label))@l;				\
220
-	addis	reg,reg,(ABS_ADDR(label))@h;
221
-
222
-/* Exception register prefixes */
223
-#define EXC_HV	H
224
-#define EXC_STD
225
-
226
-#if defined(CONFIG_RELOCATABLE)
227
-/*
228
- * If we support interrupts with relocation on AND we're a relocatable kernel,
229
- * we need to use CTR to get to the 2nd level handler.  So, save/restore it
230
- * when required.
231
- */
232
-#define SAVE_CTR(reg, area)	mfctr	reg ; 	std	reg,area+EX_CTR(r13)
233
-#define GET_CTR(reg, area) 			ld	reg,area+EX_CTR(r13)
234
-#define RESTORE_CTR(reg, area)	ld	reg,area+EX_CTR(r13) ; mtctr reg
235
-#else
236
-/* ...else CTR is unused and in register. */
237
-#define SAVE_CTR(reg, area)
238
-#define GET_CTR(reg, area) 	mfctr	reg
239
-#define RESTORE_CTR(reg, area)
240
-#endif
241
-
242
-/*
243
- * PPR save/restore macros used in exceptions_64s.S  
244
- * Used for P7 or later processors
245
- */
246
-#define SAVE_PPR(area, ra, rb)						\
247
-BEGIN_FTR_SECTION_NESTED(940)						\
248
-	ld	ra,PACACURRENT(r13);					\
249
-	ld	rb,area+EX_PPR(r13);	/* Read PPR from paca */	\
250
-	std	rb,TASKTHREADPPR(ra);					\
251
-END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
252
-
253
-#define RESTORE_PPR_PACA(area, ra)					\
254
-BEGIN_FTR_SECTION_NESTED(941)						\
255
-	ld	ra,area+EX_PPR(r13);					\
256
-	mtspr	SPRN_PPR,ra;						\
257
-END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
258
-
259
-/*
260
- * Get an SPR into a register if the CPU has the given feature
261
- */
262
-#define OPT_GET_SPR(ra, spr, ftr)					\
263
-BEGIN_FTR_SECTION_NESTED(943)						\
264
-	mfspr	ra,spr;							\
265
-END_FTR_SECTION_NESTED(ftr,ftr,943)
266
-
267
-/*
268
- * Set an SPR from a register if the CPU has the given feature
269
- */
270
-#define OPT_SET_SPR(ra, spr, ftr)					\
271
-BEGIN_FTR_SECTION_NESTED(943)						\
272
-	mtspr	spr,ra;							\
273
-END_FTR_SECTION_NESTED(ftr,ftr,943)
274
-
275
-/*
276
- * Save a register to the PACA if the CPU has the given feature
277
- */
278
-#define OPT_SAVE_REG_TO_PACA(offset, ra, ftr)				\
279
-BEGIN_FTR_SECTION_NESTED(943)						\
280
-	std	ra,offset(r13);						\
281
-END_FTR_SECTION_NESTED(ftr,ftr,943)
282
-
283
-#define EXCEPTION_PROLOG_0(area)					\
284
-	GET_PACA(r13);							\
285
-	std	r9,area+EX_R9(r13);	/* save r9 */			\
286
-	OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);			\
287
-	HMT_MEDIUM;							\
288
-	std	r10,area+EX_R10(r13);	/* save r10 - r12 */		\
289
-	OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
290
-
291
-#define __EXCEPTION_PROLOG_1_PRE(area)					\
292
-	OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR);		\
293
-	OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR);		\
294
-	INTERRUPT_TO_KERNEL;						\
295
-	SAVE_CTR(r10, area);						\
296
-	mfcr	r9;
297
-
298
-#define __EXCEPTION_PROLOG_1_POST(area)					\
299
-	std	r11,area+EX_R11(r13);					\
300
-	std	r12,area+EX_R12(r13);					\
301
-	GET_SCRATCH0(r10);						\
302
-	std	r10,area+EX_R13(r13)
303
-
304
-/*
305
- * This version of the EXCEPTION_PROLOG_1 will carry
306
- * addition parameter called "bitmask" to support
307
- * checking of the interrupt maskable level in the SOFTEN_TEST.
308
- * Intended to be used in MASKABLE_EXCPETION_* macros.
309
- */
310
-#define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask)			\
311
-	__EXCEPTION_PROLOG_1_PRE(area);					\
312
-	extra(vec, bitmask);						\
313
-	__EXCEPTION_PROLOG_1_POST(area);
314
-
315
-/*
316
- * This version of the EXCEPTION_PROLOG_1 is intended
317
- * to be used in STD_EXCEPTION* macros
318
- */
319
-#define _EXCEPTION_PROLOG_1(area, extra, vec)				\
320
-	__EXCEPTION_PROLOG_1_PRE(area);					\
321
-	extra(vec);							\
322
-	__EXCEPTION_PROLOG_1_POST(area);
323
-
324
-#define EXCEPTION_PROLOG_1(area, extra, vec)				\
325
-	_EXCEPTION_PROLOG_1(area, extra, vec)
326
-
327
-#define __EXCEPTION_PROLOG_2(label, h)					\
328
-	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
329
-	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
330
-	LOAD_HANDLER(r12,label)						\
331
-	mtspr	SPRN_##h##SRR0,r12;					\
332
-	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
333
-	mtspr	SPRN_##h##SRR1,r10;					\
334
-	h##RFI_TO_KERNEL;						\
335
-	b	.	/* prevent speculative execution */
336
-#define EXCEPTION_PROLOG_2(label, h)					\
337
-	__EXCEPTION_PROLOG_2(label, h)
338
-
339
-/* _NORI variant keeps MSR_RI clear */
340
-#define __EXCEPTION_PROLOG_2_NORI(label, h)				\
341
-	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
342
-	xori	r10,r10,MSR_RI;		/* Clear MSR_RI */		\
343
-	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
344
-	LOAD_HANDLER(r12,label)						\
345
-	mtspr	SPRN_##h##SRR0,r12;					\
346
-	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
347
-	mtspr	SPRN_##h##SRR1,r10;					\
348
-	h##RFI_TO_KERNEL;						\
349
-	b	.	/* prevent speculative execution */
350
-
351
-#define EXCEPTION_PROLOG_2_NORI(label, h)				\
352
-	__EXCEPTION_PROLOG_2_NORI(label, h)
353
-
354
-#define EXCEPTION_PROLOG(area, label, h, extra, vec)			\
355
-	SET_SCRATCH0(r13);		/* save r13 */			\
356
-	EXCEPTION_PROLOG_0(area);					\
357
-	EXCEPTION_PROLOG_1(area, extra, vec);				\
358
-	EXCEPTION_PROLOG_2(label, h);
359
-
360
-#define __KVMTEST(h, n)							\
361
-	lbz	r10,HSTATE_IN_GUEST(r13);				\
362
-	cmpwi	r10,0;							\
363
-	bne	do_kvm_##h##n
364
-
365
-#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
366
-/*
367
- * If hv is possible, interrupts come into to the hv version
368
- * of the kvmppc_interrupt code, which then jumps to the PR handler,
369
- * kvmppc_interrupt_pr, if the guest is a PR guest.
370
- */
371
-#define kvmppc_interrupt kvmppc_interrupt_hv
372
-#else
373
-#define kvmppc_interrupt kvmppc_interrupt_pr
374
-#endif
375
-
376
-/*
377
- * Branch to label using its 0xC000 address. This results in instruction
378
- * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
379
- * on using mtmsr rather than rfid.
380
- *
381
- * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than
382
- * load KBASE for a slight optimisation.
383
- */
384
-#define BRANCH_TO_C000(reg, label)					\
385
-	__LOAD_HANDLER(reg, label);					\
386
-	mtctr	reg;							\
387
-	bctr
388
-
389
-#ifdef CONFIG_RELOCATABLE
390
-#define BRANCH_TO_COMMON(reg, label)					\
391
-	__LOAD_HANDLER(reg, label);					\
392
-	mtctr	reg;							\
393
-	bctr
394
-
395
-#define BRANCH_LINK_TO_FAR(label)					\
396
-	__LOAD_FAR_HANDLER(r12, label);					\
397
-	mtctr	r12;							\
398
-	bctrl
399
-
400
-/*
401
- * KVM requires __LOAD_FAR_HANDLER.
402
- *
403
- * __BRANCH_TO_KVM_EXIT branches are also a special case because they
404
- * explicitly use r9 then reload it from PACA before branching. Hence
405
- * the double-underscore.
406
- */
407
-#define __BRANCH_TO_KVM_EXIT(area, label)				\
408
-	mfctr	r9;							\
409
-	std	r9,HSTATE_SCRATCH1(r13);				\
410
-	__LOAD_FAR_HANDLER(r9, label);					\
411
-	mtctr	r9;							\
412
-	ld	r9,area+EX_R9(r13);					\
413
-	bctr
414
-
415
-#else
416
-#define BRANCH_TO_COMMON(reg, label)					\
417
-	b	label
418
-
419
-#define BRANCH_LINK_TO_FAR(label)					\
420
-	bl	label
421
-
422
-#define __BRANCH_TO_KVM_EXIT(area, label)				\
423
-	ld	r9,area+EX_R9(r13);					\
424
-	b	label
425
-
426
-#endif
427
-
428
-/* Do not enable RI */
429
-#define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec)		\
430
-	EXCEPTION_PROLOG_0(area);					\
431
-	EXCEPTION_PROLOG_1(area, extra, vec);				\
432
-	EXCEPTION_PROLOG_2_NORI(label, h);
433
-
434
-
435
-#define __KVM_HANDLER(area, h, n)					\
436
-	BEGIN_FTR_SECTION_NESTED(947)					\
437
-	ld	r10,area+EX_CFAR(r13);					\
438
-	std	r10,HSTATE_CFAR(r13);					\
439
-	END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947);		\
440
-	BEGIN_FTR_SECTION_NESTED(948)					\
441
-	ld	r10,area+EX_PPR(r13);					\
442
-	std	r10,HSTATE_PPR(r13);					\
443
-	END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948);	\
444
-	ld	r10,area+EX_R10(r13);					\
445
-	std	r12,HSTATE_SCRATCH0(r13);				\
446
-	sldi	r12,r9,32;						\
447
-	ori	r12,r12,(n);						\
448
-	/* This reloads r9 before branching to kvmppc_interrupt */	\
449
-	__BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt)
450
-
451
-#define __KVM_HANDLER_SKIP(area, h, n)					\
452
-	cmpwi	r10,KVM_GUEST_MODE_SKIP;				\
453
-	beq	89f;							\
454
-	BEGIN_FTR_SECTION_NESTED(948)					\
455
-	ld	r10,area+EX_PPR(r13);					\
456
-	std	r10,HSTATE_PPR(r13);					\
457
-	END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948);	\
458
-	ld	r10,area+EX_R10(r13);					\
459
-	std	r12,HSTATE_SCRATCH0(r13);				\
460
-	sldi	r12,r9,32;						\
461
-	ori	r12,r12,(n);						\
462
-	/* This reloads r9 before branching to kvmppc_interrupt */	\
463
-	__BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt);			\
464
-89:	mtocrf	0x80,r9;						\
465
-	ld	r9,area+EX_R9(r13);					\
466
-	ld	r10,area+EX_R10(r13);					\
467
-	b	kvmppc_skip_##h##interrupt
468
-
469
-#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
470
-#define KVMTEST(h, n)			__KVMTEST(h, n)
471
-#define KVM_HANDLER(area, h, n)		__KVM_HANDLER(area, h, n)
472
-#define KVM_HANDLER_SKIP(area, h, n)	__KVM_HANDLER_SKIP(area, h, n)
473
-
474
-#else
475
-#define KVMTEST(h, n)
476
-#define KVM_HANDLER(area, h, n)
477
-#define KVM_HANDLER_SKIP(area, h, n)
478
-#endif
479
-
480
-#define NOTEST(n)
481
-
482
-#define EXCEPTION_PROLOG_COMMON_1()					   \
483
-	std	r9,_CCR(r1);		/* save CR in stackframe	*/ \
484
-	std	r11,_NIP(r1);		/* save SRR0 in stackframe	*/ \
485
-	std	r12,_MSR(r1);		/* save SRR1 in stackframe	*/ \
486
-	std	r10,0(r1);		/* make stack chain pointer	*/ \
487
-	std	r0,GPR0(r1);		/* save r0 in stackframe	*/ \
488
-	std	r10,GPR1(r1);		/* save r1 in stackframe	*/ \
489
-
490
-
491
-/*
492
- * The common exception prolog is used for all except a few exceptions
493
- * such as a segment miss on a kernel address.  We have to be prepared
494
- * to take another exception from the point where we first touch the
495
- * kernel stack onwards.
496
- *
497
- * On entry r13 points to the paca, r9-r13 are saved in the paca,
498
- * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
499
- * SRR1, and relocation is on.
500
- */
501
-#define EXCEPTION_PROLOG_COMMON(n, area)				   \
502
-	andi.	r10,r12,MSR_PR;		/* See if coming from user	*/ \
503
-	mr	r10,r1;			/* Save r1			*/ \
504
-	subi	r1,r1,INT_FRAME_SIZE;	/* alloc frame on kernel stack	*/ \
505
-	beq-	1f;							   \
506
-	ld	r1,PACAKSAVE(r13);	/* kernel stack to use		*/ \
507
-1:	cmpdi	cr1,r1,-INT_FRAME_SIZE;	/* check if r1 is in userspace	*/ \
508
-	blt+	cr1,3f;			/* abort if it is		*/ \
509
-	li	r1,(n);			/* will be reloaded later	*/ \
510
-	sth	r1,PACA_TRAP_SAVE(r13);					   \
511
-	std	r3,area+EX_R3(r13);					   \
512
-	addi	r3,r13,area;		/* r3 -> where regs are saved*/	   \
513
-	RESTORE_CTR(r1, area);						   \
514
-	b	bad_stack;						   \
515
-3:	EXCEPTION_PROLOG_COMMON_1();					   \
516
-	beq	4f;			/* if from kernel mode		*/ \
517
-	ACCOUNT_CPU_USER_ENTRY(r13, r9, r10);				   \
518
-	SAVE_PPR(area, r9, r10);					   \
519
-4:	EXCEPTION_PROLOG_COMMON_2(area)					   \
520
-	EXCEPTION_PROLOG_COMMON_3(n)					   \
521
-	ACCOUNT_STOLEN_TIME
522
-
523
-/* Save original regs values from save area to stack frame. */
524
-#define EXCEPTION_PROLOG_COMMON_2(area)					   \
525
-	ld	r9,area+EX_R9(r13);	/* move r9, r10 to stackframe	*/ \
526
-	ld	r10,area+EX_R10(r13);					   \
527
-	std	r9,GPR9(r1);						   \
528
-	std	r10,GPR10(r1);						   \
529
-	ld	r9,area+EX_R11(r13);	/* move r11 - r13 to stackframe	*/ \
530
-	ld	r10,area+EX_R12(r13);					   \
531
-	ld	r11,area+EX_R13(r13);					   \
532
-	std	r9,GPR11(r1);						   \
533
-	std	r10,GPR12(r1);						   \
534
-	std	r11,GPR13(r1);						   \
535
-	BEGIN_FTR_SECTION_NESTED(66);					   \
536
-	ld	r10,area+EX_CFAR(r13);					   \
537
-	std	r10,ORIG_GPR3(r1);					   \
538
-	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);		   \
539
-	GET_CTR(r10, area);						   \
540
-	std	r10,_CTR(r1);
541
-
542
-#define EXCEPTION_PROLOG_COMMON_3(n)					   \
543
-	std	r2,GPR2(r1);		/* save r2 in stackframe	*/ \
544
-	SAVE_4GPRS(3, r1);		/* save r3 - r6 in stackframe   */ \
545
-	SAVE_2GPRS(7, r1);		/* save r7, r8 in stackframe	*/ \
546
-	mflr	r9;			/* Get LR, later save to stack	*/ \
547
-	ld	r2,PACATOC(r13);	/* get kernel TOC into r2	*/ \
548
-	std	r9,_LINK(r1);						   \
549
-	lbz	r10,PACAIRQSOFTMASK(r13);				   \
550
-	mfspr	r11,SPRN_XER;		/* save XER in stackframe	*/ \
551
-	std	r10,SOFTE(r1);						   \
552
-	std	r11,_XER(r1);						   \
553
-	li	r9,(n)+1;						   \
554
-	std	r9,_TRAP(r1);		/* set trap number		*/ \
555
-	li	r10,0;							   \
556
-	ld	r11,exception_marker@toc(r2);				   \
557
-	std	r10,RESULT(r1);		/* clear regs->result		*/ \
558
-	std	r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame	*/
559
-
560
-/*
561
- * Exception vectors.
562
- */
563
-#define STD_EXCEPTION(vec, label)				\
564
-	EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_STD, KVMTEST_PR, vec);
565
-
566
-/* Version of above for when we have to branch out-of-line */
567
-#define __OOL_EXCEPTION(vec, label, hdlr)			\
568
-	SET_SCRATCH0(r13)					\
569
-	EXCEPTION_PROLOG_0(PACA_EXGEN)				\
570
-	b hdlr;
571
-
572
-#define STD_EXCEPTION_OOL(vec, label)				\
573
-	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec);	\
574
-	EXCEPTION_PROLOG_2(label, EXC_STD)
575
-
576
-#define STD_EXCEPTION_HV(loc, vec, label)			\
577
-	EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec);
578
-
579
-#define STD_EXCEPTION_HV_OOL(vec, label)			\
580
-	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec);	\
581
-	EXCEPTION_PROLOG_2(label, EXC_HV)
582
-
583
-#define STD_RELON_EXCEPTION(loc, vec, label)		\
584
-	/* No guest interrupts come through here */	\
585
-	EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, NOTEST, vec);
586
-
587
-#define STD_RELON_EXCEPTION_OOL(vec, label)			\
588
-	EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec);		\
589
-	EXCEPTION_PROLOG_2_RELON(label, EXC_STD)
590
-
591
-#define STD_RELON_EXCEPTION_HV(loc, vec, label)		\
592
-	EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec);
593
-
594
-#define STD_RELON_EXCEPTION_HV_OOL(vec, label)			\
595
-	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec);	\
596
-	EXCEPTION_PROLOG_2_RELON(label, EXC_HV)
597
-
598
-/* This associate vector numbers with bits in paca->irq_happened */
599
-#define SOFTEN_VALUE_0x500	PACA_IRQ_EE
600
-#define SOFTEN_VALUE_0x900	PACA_IRQ_DEC
601
-#define SOFTEN_VALUE_0x980	PACA_IRQ_DEC
602
-#define SOFTEN_VALUE_0xa00	PACA_IRQ_DBELL
603
-#define SOFTEN_VALUE_0xe80	PACA_IRQ_DBELL
604
-#define SOFTEN_VALUE_0xe60	PACA_IRQ_HMI
605
-#define SOFTEN_VALUE_0xea0	PACA_IRQ_EE
606
-#define SOFTEN_VALUE_0xf00	PACA_IRQ_PMI
607
-
608
-#define __SOFTEN_TEST(h, vec, bitmask)					\
609
-	lbz	r10,PACAIRQSOFTMASK(r13);				\
610
-	andi.	r10,r10,bitmask;					\
611
-	li	r10,SOFTEN_VALUE_##vec;					\
612
-	bne	masked_##h##interrupt
613
-
614
-#define _SOFTEN_TEST(h, vec, bitmask)	__SOFTEN_TEST(h, vec, bitmask)
615
-
616
-#define SOFTEN_TEST_PR(vec, bitmask)					\
617
-	KVMTEST(EXC_STD, vec);						\
618
-	_SOFTEN_TEST(EXC_STD, vec, bitmask)
619
-
620
-#define SOFTEN_TEST_HV(vec, bitmask)					\
621
-	KVMTEST(EXC_HV, vec);						\
622
-	_SOFTEN_TEST(EXC_HV, vec, bitmask)
623
-
624
-#define KVMTEST_PR(vec)							\
625
-	KVMTEST(EXC_STD, vec)
626
-
627
-#define KVMTEST_HV(vec)							\
628
-	KVMTEST(EXC_HV, vec)
629
-
630
-#define SOFTEN_NOTEST_PR(vec, bitmask)	_SOFTEN_TEST(EXC_STD, vec, bitmask)
631
-#define SOFTEN_NOTEST_HV(vec, bitmask)	_SOFTEN_TEST(EXC_HV, vec, bitmask)
632
-
633
-#define __MASKABLE_EXCEPTION(vec, label, h, extra, bitmask)		\
634
-	SET_SCRATCH0(r13);    /* save r13 */				\
635
-	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
636
-	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask);	\
637
-	EXCEPTION_PROLOG_2(label, h);
638
-
639
-#define MASKABLE_EXCEPTION(vec, label, bitmask)				\
640
-	__MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask)
641
-
642
-#define MASKABLE_EXCEPTION_OOL(vec, label, bitmask)			\
643
-	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\
644
-	EXCEPTION_PROLOG_2(label, EXC_STD)
645
-
646
-#define MASKABLE_EXCEPTION_HV(vec, label, bitmask)			\
647
-	__MASKABLE_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
648
-
649
-#define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask)			\
650
-	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
651
-	EXCEPTION_PROLOG_2(label, EXC_HV)
652
-
653
-#define __MASKABLE_RELON_EXCEPTION(vec, label, h, extra, bitmask)	\
654
-	SET_SCRATCH0(r13);    /* save r13 */				\
655
-	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
656
-	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask);	\
657
-	EXCEPTION_PROLOG_2_RELON(label, h)
658
-
659
-#define MASKABLE_RELON_EXCEPTION(vec, label, bitmask)			\
660
-	__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, SOFTEN_NOTEST_PR, bitmask)
661
-
662
-#define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask)		\
663
-	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
664
-	EXCEPTION_PROLOG_2(label, EXC_STD);
665
-
666
-#define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask)		\
667
-	__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
668
-
669
-#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask)		\
670
-	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
671
-	EXCEPTION_PROLOG_2_RELON(label, EXC_HV)
672
-
673
-/*
674
- * Our exception common code can be passed various "additions"
675
- * to specify the behaviour of interrupts, whether to kick the
676
- * runlatch, etc...
677
- */
678
-
679
-/*
680
- * This addition reconciles our actual IRQ state with the various software
681
- * flags that track it. This may call C code.
682
- */
683
-#define ADD_RECONCILE	RECONCILE_IRQ_STATE(r10,r11)
684
-
685
-#define ADD_NVGPRS				\
686
-	bl	save_nvgprs
687
-
688
-#define RUNLATCH_ON				\
689
-BEGIN_FTR_SECTION				\
690
-	CURRENT_THREAD_INFO(r3, r1);		\
691
-	ld	r4,TI_LOCAL_FLAGS(r3);		\
692
-	andi.	r0,r4,_TLF_RUNLATCH;		\
693
-	beql	ppc64_runlatch_on_trampoline;	\
694
-END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
695
-
696
-#define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \
697
-	EXCEPTION_PROLOG_COMMON(trap, area);			\
698
-	/* Volatile regs are potentially clobbered here */	\
699
-	additions;						\
700
-	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
701
-	bl	hdlr;						\
702
-	b	ret
703
-
704
-/*
705
- * Exception where stack is already set in r1, r1 is saved in r10, and it
706
- * continues rather than returns.
707
- */
708
-#define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \
709
-	EXCEPTION_PROLOG_COMMON_1();				\
710
-	EXCEPTION_PROLOG_COMMON_2(area);			\
711
-	EXCEPTION_PROLOG_COMMON_3(trap);			\
712
-	/* Volatile regs are potentially clobbered here */	\
713
-	additions;						\
714
-	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
715
-	bl	hdlr
716
-
717
-#define STD_EXCEPTION_COMMON(trap, label, hdlr)			\
718
-	EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr,		\
719
-		ret_from_except, ADD_NVGPRS;ADD_RECONCILE)
720
-
721
-/*
722
- * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
723
- * in the idle task and therefore need the special idle handling
724
- * (finish nap and runlatch)
725
- */
726
-#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr)		\
727
-	EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr,		\
728
-		ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON)
729
-
730
-/*
731
- * When the idle code in power4_idle puts the CPU into NAP mode,
732
- * it has to do so in a loop, and relies on the external interrupt
733
- * and decrementer interrupt entry code to get it out of the loop.
734
- * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
735
- * to signal that it is in the loop and needs help to get out.
736
- */
737
-#ifdef CONFIG_PPC_970_NAP
738
-#define FINISH_NAP				\
739
-BEGIN_FTR_SECTION				\
740
-	CURRENT_THREAD_INFO(r11, r1);		\
741
-	ld	r9,TI_LOCAL_FLAGS(r11);		\
742
-	andi.	r10,r9,_TLF_NAPPING;		\
743
-	bnel	power4_fixup_nap;		\
744
-END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
745
-#else
746
-#define FINISH_NAP
747
-#endif
160
+#else /* __ASSEMBLY__ */
161
+/* Prototype for function defined in exceptions-64s.S */
162
+void do_uaccess_flush(void);
163
+#endif /* __ASSEMBLY__ */
748164 
749165 #endif	/* _ASM_POWERPC_EXCEPTION_H */