forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/mips/lantiq/xway/sysctrl.c
....@@ -1,7 +1,5 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
2
- *  This program is free software; you can redistribute it and/or modify it
3
- *  under the terms of the GNU General Public License version 2 as published
4
- *  by the Free Software Foundation.
53  *
64  *  Copyright (C) 2011-2012 John Crispin <john@phrozen.org>
75  *  Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
....@@ -114,11 +112,15 @@
114112 #define PMU_PPE_DP	BIT(23)
115113 #define PMU_PPE_DPLUS	BIT(24)
116114 #define PMU_USB1_P	BIT(26)
115
+#define PMU_GPHY3	BIT(26) /* grx390 */
117116 #define PMU_USB1	BIT(27)
118117 #define PMU_SWITCH	BIT(28)
119118 #define PMU_PPE_TOP	BIT(29)
119
+#define PMU_GPHY0	BIT(29) /* ar10, xrx390 */
120120 #define PMU_GPHY	BIT(30)
121
+#define PMU_GPHY1	BIT(30) /* ar10, xrx390 */
121122 #define PMU_PCIE_CLK	BIT(31)
123
+#define PMU_GPHY2	BIT(31) /* ar10, xrx390 */
122124 
123125 #define PMU1_PCIE_PHY	BIT(0)	/* vr9-specific,moved in ar10/grx390 */
124126 #define PMU1_PCIE_CTL	BIT(1)
....@@ -313,6 +315,8 @@
313315 {
314316 	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
315317 
318
+	if (!clk)
319
+		return;
316320 	clk->cl.dev_id = dev;
317321 	clk->cl.con_id = con;
318322 	clk->cl.clk = clk;
....@@ -336,6 +340,8 @@
336340 {
337341 	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
338342 
343
+	if (!clk)
344
+		return;
339345 	clk->cl.dev_id = dev;
340346 	clk->cl.con_id = con;
341347 	clk->cl.clk = clk;
....@@ -354,24 +360,28 @@
354360 	struct clk *clk_ext = kzalloc(sizeof(struct clk), GFP_KERNEL);
355361 
356362 	/* main pci clock */
357
-	clk->cl.dev_id = "17000000.pci";
358
-	clk->cl.con_id = NULL;
359
-	clk->cl.clk = clk;
360
-	clk->rate = CLOCK_33M;
361
-	clk->rates = valid_pci_rates;
362
-	clk->enable = pci_enable;
363
-	clk->disable = pmu_disable;
364
-	clk->module = 0;
365
-	clk->bits = PMU_PCI;
366
-	clkdev_add(&clk->cl);
363
+	if (clk) {
364
+		clk->cl.dev_id = "17000000.pci";
365
+		clk->cl.con_id = NULL;
366
+		clk->cl.clk = clk;
367
+		clk->rate = CLOCK_33M;
368
+		clk->rates = valid_pci_rates;
369
+		clk->enable = pci_enable;
370
+		clk->disable = pmu_disable;
371
+		clk->module = 0;
372
+		clk->bits = PMU_PCI;
373
+		clkdev_add(&clk->cl);
374
+	}
367375 
368376 	/* use internal/external bus clock */
369
-	clk_ext->cl.dev_id = "17000000.pci";
370
-	clk_ext->cl.con_id = "external";
371
-	clk_ext->cl.clk = clk_ext;
372
-	clk_ext->enable = pci_ext_enable;
373
-	clk_ext->disable = pci_ext_disable;
374
-	clkdev_add(&clk_ext->cl);
377
+	if (clk_ext) {
378
+		clk_ext->cl.dev_id = "17000000.pci";
379
+		clk_ext->cl.con_id = "external";
380
+		clk_ext->cl.clk = clk_ext;
381
+		clk_ext->enable = pci_ext_enable;
382
+		clk_ext->disable = pci_ext_disable;
383
+		clkdev_add(&clk_ext->cl);
384
+	}
375385 }
376386 
377387 /* xway socs can generate clocks on gpio pins */
....@@ -391,9 +401,15 @@
391401 		char *name;
392402 
393403 		name = kzalloc(sizeof("clkout0"), GFP_KERNEL);
404
+		if (!name)
405
+			continue;
394406 		sprintf(name, "clkout%d", i);
395407 
396408 		clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
409
+		if (!clk) {
410
+			kfree(name);
411
+			continue;
412
+		}
397413 		clk->cl.dev_id = "1f103000.cgu";
398414 		clk->cl.con_id = name;
399415 		clk->cl.clk = clk;
....@@ -433,10 +449,10 @@
433449 				res_ebu.name))
434450 		pr_err("Failed to request core resources");
435451 
436
-	pmu_membase = ioremap_nocache(res_pmu.start, resource_size(&res_pmu));
437
-	ltq_cgu_membase = ioremap_nocache(res_cgu.start,
452
+	pmu_membase = ioremap(res_pmu.start, resource_size(&res_pmu));
453
+	ltq_cgu_membase = ioremap(res_cgu.start,
438454 						resource_size(&res_cgu));
439
-	ltq_ebu_membase = ioremap_nocache(res_ebu.start,
455
+	ltq_ebu_membase = ioremap(res_ebu.start,
440456 						resource_size(&res_ebu));
441457 	if (!pmu_membase || !ltq_cgu_membase || !ltq_ebu_membase)
442458 		panic("Failed to remap core resources");
....@@ -467,17 +483,20 @@
467483 
468484 	if (of_machine_is_compatible("lantiq,grx390") ||
469485 	    of_machine_is_compatible("lantiq,ar10")) {
486
+		clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY0);
487
+		clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY1);
488
+		clkdev_add_pmu("1e108000.switch", "gphy2", 0, 0, PMU_GPHY2);
470489 		clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB0_P);
471490 		clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB1_P);
472491 		/* rc 0 */
473
-		clkdev_add_pmu("1d900000.pcie", "phy", 1, 2, PMU_ANALOG_PCIE0_P);
492
+		clkdev_add_pmu("1f106800.phy", "phy", 1, 2, PMU_ANALOG_PCIE0_P);
474493 		clkdev_add_pmu("1d900000.pcie", "msi", 1, 1, PMU1_PCIE_MSI);
475
-		clkdev_add_pmu("1d900000.pcie", "pdi", 1, 1, PMU1_PCIE_PDI);
494
+		clkdev_add_pmu("1f106800.phy", "pdi", 1, 1, PMU1_PCIE_PDI);
476495 		clkdev_add_pmu("1d900000.pcie", "ctl", 1, 1, PMU1_PCIE_CTL);
477496 		/* rc 1 */
478
-		clkdev_add_pmu("19000000.pcie", "phy", 1, 2, PMU_ANALOG_PCIE1_P);
497
+		clkdev_add_pmu("1f700400.phy", "phy", 1, 2, PMU_ANALOG_PCIE1_P);
479498 		clkdev_add_pmu("19000000.pcie", "msi", 1, 1, PMU1_PCIE1_MSI);
480
-		clkdev_add_pmu("19000000.pcie", "pdi", 1, 1, PMU1_PCIE1_PDI);
499
+		clkdev_add_pmu("1f700400.phy", "pdi", 1, 1, PMU1_PCIE1_PDI);
481500 		clkdev_add_pmu("19000000.pcie", "ctl", 1, 1, PMU1_PCIE1_CTL);
482501 	}
483502 
....@@ -498,14 +517,15 @@
498517 	} else if (of_machine_is_compatible("lantiq,grx390")) {
499518 		clkdev_add_static(ltq_grx390_cpu_hz(), ltq_grx390_fpi_hz(),
500519 				  ltq_grx390_fpi_hz(), ltq_grx390_pp32_hz());
520
+		clkdev_add_pmu("1e108000.switch", "gphy3", 0, 0, PMU_GPHY3);
501521 		clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
502522 		clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
503523 		/* rc 2 */
504
-		clkdev_add_pmu("1a800000.pcie", "phy", 1, 2, PMU_ANALOG_PCIE2_P);
524
+		clkdev_add_pmu("1f106a00.pcie", "phy", 1, 2, PMU_ANALOG_PCIE2_P);
505525 		clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
506
-		clkdev_add_pmu("1a800000.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
526
+		clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
507527 		clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
508
-		clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
528
+		clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
509529 		clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
510530 		clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
511531 	} else if (of_machine_is_compatible("lantiq,ar10")) {
....@@ -513,11 +533,9 @@
513533 				  ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
514534 		clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
515535 		clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
516
-		clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
536
+		clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
517537 			       PMU_PPE_DP | PMU_PPE_TC);
518538 		clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
519
-		clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY);
520
-		clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY);
521539 		clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
522540 		clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
523541 		clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
....@@ -528,20 +546,20 @@
528546 		clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);
529547 		clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P);
530548 		clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM);
531
-		clkdev_add_pmu("1d900000.pcie", "phy", 1, 1, PMU1_PCIE_PHY);
549
+		clkdev_add_pmu("1f106800.phy", "phy", 1, 1, PMU1_PCIE_PHY);
532550 		clkdev_add_pmu("1d900000.pcie", "bus", 1, 0, PMU_PCIE_CLK);
533551 		clkdev_add_pmu("1d900000.pcie", "msi", 1, 1, PMU1_PCIE_MSI);
534
-		clkdev_add_pmu("1d900000.pcie", "pdi", 1, 1, PMU1_PCIE_PDI);
552
+		clkdev_add_pmu("1f106800.phy", "pdi", 1, 1, PMU1_PCIE_PDI);
535553 		clkdev_add_pmu("1d900000.pcie", "ctl", 1, 1, PMU1_PCIE_CTL);
536554 		clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
537555 
538556 		clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
539
-		clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
557
+		clkdev_add_pmu("1e10b308.eth", NULL, 0, 0,
540558 				PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
541559 				PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
542560 				PMU_PPE_QSB | PMU_PPE_TOP);
543
-		clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
544
-		clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
561
+		clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
562
+		clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
545563 		clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
546564 		clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
547565 		clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);