add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/mips/cavium-octeon/octeon-irq.c
..
..
@@ -127,6 +127,16 @@
127
127
 static int octeon_irq_force_ciu_mapping(struct irq_domain *domain,
128
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 					int irq, int line, int bit)
129
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 {
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+	struct device_node *of_node;
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+	int ret;
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+
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+	of_node = irq_domain_get_of_node(domain);
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+	if (!of_node)
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+		return -EINVAL;
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+	ret = irq_alloc_desc_at(irq, of_node_to_nid(of_node));
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+	if (ret < 0)
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+		return ret;
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+
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 	return irq_domain_associate(domain, irq, line << 6 | bit);
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 }
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142
 
..
..
@@ -1180,8 +1190,8 @@
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1190
 		type = IRQ_TYPE_LEVEL_LOW;
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1191
 		break;
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 	default:
1183
-		pr_err("Error: (%s) Invalid irq trigger specification: %x\n",
1184
-		       node->name,
1193
+		pr_err("Error: (%pOFn) Invalid irq trigger specification: %x\n",
1194
+		       node,
1185
1195
 		       trigger);
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 		type = IRQ_TYPE_LEVEL_LOW;
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 		break;
..
..
@@ -2193,7 +2203,7 @@
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 	struct octeon_irq_cib_chip_data *cd;
2194
2204
 
2195
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 	if (hw >= host_data->max_bits) {
2196
-		pr_err("ERROR: %s mapping %u is to big!\n",
2206
+		pr_err("ERROR: %s mapping %u is too big!\n",
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 		       irq_domain_get_of_node(d)->name, (unsigned)hw);
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2208
 		return -EINVAL;
2199
2209
 	}
..
..
@@ -2274,8 +2284,8 @@
2274
2284
 
2275
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 	parent_irq = irq_of_parse_and_map(ciu_node, 0);
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2286
 	if (!parent_irq) {
2277
-		pr_err("ERROR: Couldn't acquire parent_irq for %s\n",
2278
-			ciu_node->name);
2287
+		pr_err("ERROR: Couldn't acquire parent_irq for %pOFn\n",
2288
+			ciu_node);
2279
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 		return -EINVAL;
2280
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 	}
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2291
 
..
..
@@ -2286,7 +2296,7 @@
2286
2296
 
2287
2297
 	addr = of_get_address(ciu_node, 0, NULL, NULL);
2288
2298
 	if (!addr) {
2289
-		pr_err("ERROR: Couldn't acquire reg(0) %s\n", ciu_node->name);
2299
+		pr_err("ERROR: Couldn't acquire reg(0) %pOFn\n", ciu_node);
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2300
 		return -EINVAL;
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2301
 	}
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2302
 	host_data->raw_reg = (u64)phys_to_virt(
..
..
@@ -2294,7 +2304,7 @@
2294
2304
 
2295
2305
 	addr = of_get_address(ciu_node, 1, NULL, NULL);
2296
2306
 	if (!addr) {
2297
-		pr_err("ERROR: Couldn't acquire reg(1) %s\n", ciu_node->name);
2307
+		pr_err("ERROR: Couldn't acquire reg(1) %pOFn\n", ciu_node);
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 		return -EINVAL;
2299
2309
 	}
2300
2310
 	host_data->en_reg = (u64)phys_to_virt(
..
..
@@ -2302,8 +2312,8 @@
2302
2312
 
2303
2313
 	r = of_property_read_u32(ciu_node, "cavium,max-bits", &val);
2304
2314
 	if (r) {
2305
-		pr_err("ERROR: Couldn't read cavium,max-bits from %s\n",
2306
-			ciu_node->name);
2315
+		pr_err("ERROR: Couldn't read cavium,max-bits from %pOFn\n",
2316
+			ciu_node);
2307
2317
 		return r;
2308
2318
 	}
2309
2319
 	host_data->max_bits = val;
..
..
@@ -2486,8 +2496,8 @@
2486
2496
 }
2487
2497
 
2488
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 #ifdef CONFIG_SMP
2489
-int octeon_irq_ciu3_set_affinity(struct irq_data *data,
2490
-				 const struct cpumask *dest, bool force)
2499
+static int octeon_irq_ciu3_set_affinity(struct irq_data *data,
2500
+					const struct cpumask *dest, bool force)
2491
2501
 {
2492
2502
 	union cvmx_ciu3_iscx_ctl isc_ctl;
2493
2503
 	union cvmx_ciu3_iscx_w1c isc_w1c;