| .. | .. |
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| 31 | 31 | * network ports from the rest of the cvmx-helper files. |
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| 32 | 32 | */ |
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| 33 | 33 | |
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| 34 | +#include <linux/bug.h> |
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| 34 | 35 | #include <asm/octeon/octeon.h> |
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| 35 | 36 | #include <asm/octeon/cvmx-bootinfo.h> |
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| 36 | 37 | |
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| .. | .. |
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| 206 | 207 | * Returns The ports link status. If the link isn't fully resolved, this must |
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| 207 | 208 | * return zero. |
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| 208 | 209 | */ |
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| 209 | | -cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port) |
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| 210 | +union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port) |
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| 210 | 211 | { |
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| 211 | | - cvmx_helper_link_info_t result; |
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| 212 | + union cvmx_helper_link_info result; |
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| 213 | + |
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| 214 | + WARN(!octeon_is_simulation(), |
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| 215 | + "Using deprecated link status - please update your DT"); |
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| 212 | 216 | |
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| 213 | 217 | /* Unless we fix it later, all links are defaulted to down */ |
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| 214 | 218 | result.u64 = 0; |
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| 215 | 219 | |
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| 216 | | - /* |
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| 217 | | - * This switch statement should handle all ports that either don't use |
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| 218 | | - * Marvell PHYS, or don't support in-band status. |
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| 219 | | - */ |
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| 220 | | - switch (cvmx_sysinfo_get()->board_type) { |
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| 221 | | - case CVMX_BOARD_TYPE_SIM: |
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| 220 | + if (octeon_is_simulation()) { |
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| 222 | 221 | /* The simulator gives you a simulated 1Gbps full duplex link */ |
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| 223 | 222 | result.s.link_up = 1; |
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| 224 | 223 | result.s.full_duplex = 1; |
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| 225 | 224 | result.s.speed = 1000; |
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| 226 | 225 | return result; |
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| 227 | | - case CVMX_BOARD_TYPE_EBH3100: |
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| 228 | | - case CVMX_BOARD_TYPE_CN3010_EVB_HS5: |
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| 229 | | - case CVMX_BOARD_TYPE_CN3005_EVB_HS5: |
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| 230 | | - case CVMX_BOARD_TYPE_CN3020_EVB_HS5: |
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| 231 | | - /* Port 1 on these boards is always Gigabit */ |
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| 232 | | - if (ipd_port == 1) { |
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| 233 | | - result.s.link_up = 1; |
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| 234 | | - result.s.full_duplex = 1; |
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| 235 | | - result.s.speed = 1000; |
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| 236 | | - return result; |
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| 237 | | - } |
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| 238 | | - /* Fall through to the generic code below */ |
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| 239 | | - break; |
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| 240 | | - case CVMX_BOARD_TYPE_CUST_NB5: |
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| 241 | | - /* Port 1 on these boards is always Gigabit */ |
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| 242 | | - if (ipd_port == 1) { |
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| 243 | | - result.s.link_up = 1; |
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| 244 | | - result.s.full_duplex = 1; |
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| 245 | | - result.s.speed = 1000; |
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| 246 | | - return result; |
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| 247 | | - } |
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| 248 | | - break; |
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| 249 | | - case CVMX_BOARD_TYPE_BBGW_REF: |
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| 250 | | - /* Port 1 on these boards is always Gigabit */ |
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| 251 | | - if (ipd_port == 2) { |
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| 252 | | - /* Port 2 is not hooked up */ |
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| 253 | | - result.u64 = 0; |
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| 254 | | - return result; |
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| 255 | | - } else { |
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| 256 | | - /* Ports 0 and 1 connect to the switch */ |
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| 257 | | - result.s.link_up = 1; |
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| 258 | | - result.s.full_duplex = 1; |
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| 259 | | - result.s.speed = 1000; |
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| 260 | | - return result; |
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| 261 | | - } |
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| 262 | | - break; |
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| 263 | 226 | } |
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| 264 | 227 | |
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| 265 | 228 | if (OCTEON_IS_MODEL(OCTEON_CN3XXX) |
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| .. | .. |
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| 355 | 318 | break; |
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| 356 | 319 | } |
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| 357 | 320 | return supported_ports; |
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| 358 | | -} |
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| 359 | | - |
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| 360 | | -/** |
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| 361 | | - * Enable packet input/output from the hardware. This function is |
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| 362 | | - * called after by cvmx_helper_packet_hardware_enable() to |
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| 363 | | - * perform board specific initialization. For most boards |
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| 364 | | - * nothing is needed. |
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| 365 | | - * |
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| 366 | | - * @interface: Interface to enable |
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| 367 | | - * |
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| 368 | | - * Returns Zero on success, negative on failure |
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| 369 | | - */ |
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| 370 | | -int __cvmx_helper_board_hardware_enable(int interface) |
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| 371 | | -{ |
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| 372 | | - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_CN3005_EVB_HS5) { |
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| 373 | | - if (interface == 0) { |
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| 374 | | - /* Different config for switch port */ |
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| 375 | | - cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0); |
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| 376 | | - cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0); |
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| 377 | | - /* |
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| 378 | | - * Boards with gigabit WAN ports need a |
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| 379 | | - * different setting that is compatible with |
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| 380 | | - * 100 Mbit settings |
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| 381 | | - */ |
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| 382 | | - cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), |
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| 383 | | - 0xc); |
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| 384 | | - cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), |
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| 385 | | - 0xc); |
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| 386 | | - } |
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| 387 | | - } else if (cvmx_sysinfo_get()->board_type == |
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| 388 | | - CVMX_BOARD_TYPE_UBNT_E100) { |
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| 389 | | - cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0); |
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| 390 | | - cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0x10); |
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| 391 | | - cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0); |
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| 392 | | - cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0x10); |
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| 393 | | - cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(2, interface), 0); |
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| 394 | | - cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(2, interface), 0x10); |
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| 395 | | - } |
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| 396 | | - return 0; |
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| 397 | 321 | } |
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| 398 | 322 | |
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| 399 | 323 | /** |
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