hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/mips/boot/dts/ralink/mt7628a.dtsi
....@@ -1,3 +1,5 @@
1
+// SPDX-License-Identifier: GPL-2.0
2
+
13 / {
24 #address-cells = <1>;
35 #size-cells = <1>;
....@@ -36,7 +38,113 @@
3638
3739 sysc: system-controller@0 {
3840 compatible = "ralink,mt7620a-sysc", "syscon";
39
- reg = <0x0 0x100>;
41
+ reg = <0x0 0x60>;
42
+ };
43
+
44
+ pinmux: pinmux@60 {
45
+ compatible = "pinctrl-single";
46
+ reg = <0x60 0x8>;
47
+ #address-cells = <1>;
48
+ #size-cells = <0>;
49
+ #pinctrl-cells = <2>;
50
+ pinctrl-single,bit-per-mux;
51
+ pinctrl-single,register-width = <32>;
52
+ pinctrl-single,function-mask = <0x1>;
53
+
54
+ pinmux_gpio_gpio: pinmux_gpio_gpio {
55
+ pinctrl-single,bits = <0x0 0x0 0x3>;
56
+ };
57
+
58
+ pinmux_spi_cs1_cs: pinmux_spi_cs1_cs {
59
+ pinctrl-single,bits = <0x0 0x0 0x30>;
60
+ };
61
+
62
+ pinmux_i2s_gpio: pinmux_i2s_gpio {
63
+ pinctrl-single,bits = <0x0 0x40 0xc0>;
64
+ };
65
+
66
+ pinmux_uart0_uart: pinmux_uart0_uart0 {
67
+ pinctrl-single,bits = <0x0 0x0 0x300>;
68
+ };
69
+
70
+ pinmux_sdmode_sdxc: pinmux_sdmode_sdxc {
71
+ pinctrl-single,bits = <0x0 0x0 0xc00>;
72
+ };
73
+
74
+ pinmux_sdmode_gpio: pinmux_sdmode_gpio {
75
+ pinctrl-single,bits = <0x0 0x400 0xc00>;
76
+ };
77
+
78
+ pinmux_spi_spi: pinmux_spi_spi {
79
+ pinctrl-single,bits = <0x0 0x0 0x1000>;
80
+ };
81
+
82
+ pinmux_refclk_gpio: pinmux_refclk_gpio {
83
+ pinctrl-single,bits = <0x0 0x40000 0x40000>;
84
+ };
85
+
86
+ pinmux_i2c_i2c: pinmux_i2c_i2c {
87
+ pinctrl-single,bits = <0x0 0x0 0x300000>;
88
+ };
89
+
90
+ pinmux_uart1_uart: pinmux_uart1_uart1 {
91
+ pinctrl-single,bits = <0x0 0x0 0x3000000>;
92
+ };
93
+
94
+ pinmux_uart2_uart: pinmux_uart2_uart {
95
+ pinctrl-single,bits = <0x0 0x0 0xc000000>;
96
+ };
97
+
98
+ pinmux_pwm0_pwm: pinmux_pwm0_pwm {
99
+ pinctrl-single,bits = <0x0 0x0 0x30000000>;
100
+ };
101
+
102
+ pinmux_pwm0_gpio: pinmux_pwm0_gpio {
103
+ pinctrl-single,bits = <0x0 0x10000000
104
+ 0x30000000>;
105
+ };
106
+
107
+ pinmux_pwm1_pwm: pinmux_pwm1_pwm {
108
+ pinctrl-single,bits = <0x0 0x0 0xc0000000>;
109
+ };
110
+
111
+ pinmux_pwm1_gpio: pinmux_pwm1_gpio {
112
+ pinctrl-single,bits = <0x0 0x40000000
113
+ 0xc0000000>;
114
+ };
115
+
116
+ pinmux_p0led_an_gpio: pinmux_p0led_an_gpio {
117
+ pinctrl-single,bits = <0x4 0x4 0xc>;
118
+ };
119
+
120
+ pinmux_p1led_an_gpio: pinmux_p1led_an_gpio {
121
+ pinctrl-single,bits = <0x4 0x10 0x30>;
122
+ };
123
+
124
+ pinmux_p2led_an_gpio: pinmux_p2led_an_gpio {
125
+ pinctrl-single,bits = <0x4 0x40 0xc0>;
126
+ };
127
+
128
+ pinmux_p3led_an_gpio: pinmux_p3led_an_gpio {
129
+ pinctrl-single,bits = <0x4 0x100 0x300>;
130
+ };
131
+
132
+ pinmux_p4led_an_gpio: pinmux_p4led_an_gpio {
133
+ pinctrl-single,bits = <0x4 0x400 0xc00>;
134
+ };
135
+ };
136
+
137
+ watchdog: watchdog@100 {
138
+ compatible = "mediatek,mt7621-wdt";
139
+ reg = <0x100 0x30>;
140
+
141
+ resets = <&resetc 8>;
142
+ reset-names = "wdt";
143
+
144
+ interrupt-parent = <&intc>;
145
+ interrupts = <24>;
146
+
147
+ status = "disabled";
40148 };
41149
42150 intc: interrupt-controller@200 {
....@@ -62,9 +170,57 @@
62170 reg = <0x300 0x100>;
63171 };
64172
173
+ gpio: gpio@600 {
174
+ compatible = "mediatek,mt7621-gpio";
175
+ reg = <0x600 0x100>;
176
+
177
+ gpio-controller;
178
+ interrupt-controller;
179
+ #gpio-cells = <2>;
180
+ #interrupt-cells = <2>;
181
+
182
+ interrupt-parent = <&intc>;
183
+ interrupts = <6>;
184
+ };
185
+
186
+ spi: spi@b00 {
187
+ compatible = "ralink,mt7621-spi";
188
+ reg = <0xb00 0x100>;
189
+
190
+ pinctrl-names = "default";
191
+ pinctrl-0 = <&pinmux_spi_spi>;
192
+
193
+ resets = <&resetc 18>;
194
+ reset-names = "spi";
195
+
196
+ #address-cells = <1>;
197
+ #size-cells = <0>;
198
+
199
+ status = "disabled";
200
+ };
201
+
202
+ i2c: i2c@900 {
203
+ compatible = "mediatek,mt7621-i2c";
204
+ reg = <0x900 0x100>;
205
+
206
+ pinctrl-names = "default";
207
+ pinctrl-0 = <&pinmux_i2c_i2c>;
208
+
209
+ resets = <&resetc 16>;
210
+ reset-names = "i2c";
211
+
212
+ #address-cells = <1>;
213
+ #size-cells = <0>;
214
+
215
+ status = "disabled";
216
+ };
217
+
65218 uart0: uartlite@c00 {
66219 compatible = "ns16550a";
67220 reg = <0xc00 0x100>;
221
+
222
+ pinctrl-names = "default";
223
+ pinctrl-0 = <&pinmux_uart0_uart>;
68224
69225 resets = <&resetc 12>;
70226 reset-names = "uart0";
....@@ -79,6 +235,9 @@
79235 compatible = "ns16550a";
80236 reg = <0xd00 0x100>;
81237
238
+ pinctrl-names = "default";
239
+ pinctrl-0 = <&pinmux_uart1_uart>;
240
+
82241 resets = <&resetc 19>;
83242 reset-names = "uart1";
84243
....@@ -91,6 +250,9 @@
91250 uart2: uart2@e00 {
92251 compatible = "ns16550a";
93252 reg = <0xe00 0x100>;
253
+
254
+ pinctrl-names = "default";
255
+ pinctrl-0 = <&pinmux_uart2_uart>;
94256
95257 resets = <&resetc 20>;
96258 reset-names = "uart2";
....@@ -123,4 +285,14 @@
123285 interrupt-parent = <&intc>;
124286 interrupts = <18>;
125287 };
288
+
289
+ wmac: wmac@10300000 {
290
+ compatible = "mediatek,mt7628-wmac";
291
+ reg = <0x10300000 0x100000>;
292
+
293
+ interrupt-parent = <&cpuintc>;
294
+ interrupts = <6>;
295
+
296
+ status = "disabled";
297
+ };
126298 };