.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 2 | + |
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1 | 3 | / { |
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2 | 4 | #address-cells = <1>; |
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3 | 5 | #size-cells = <1>; |
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.. | .. |
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36 | 38 | |
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37 | 39 | sysc: system-controller@0 { |
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38 | 40 | compatible = "ralink,mt7620a-sysc", "syscon"; |
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39 | | - reg = <0x0 0x100>; |
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| 41 | + reg = <0x0 0x60>; |
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| 42 | + }; |
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| 43 | + |
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| 44 | + pinmux: pinmux@60 { |
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| 45 | + compatible = "pinctrl-single"; |
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| 46 | + reg = <0x60 0x8>; |
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| 47 | + #address-cells = <1>; |
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| 48 | + #size-cells = <0>; |
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| 49 | + #pinctrl-cells = <2>; |
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| 50 | + pinctrl-single,bit-per-mux; |
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| 51 | + pinctrl-single,register-width = <32>; |
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| 52 | + pinctrl-single,function-mask = <0x1>; |
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| 53 | + |
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| 54 | + pinmux_gpio_gpio: pinmux_gpio_gpio { |
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| 55 | + pinctrl-single,bits = <0x0 0x0 0x3>; |
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| 56 | + }; |
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| 57 | + |
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| 58 | + pinmux_spi_cs1_cs: pinmux_spi_cs1_cs { |
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| 59 | + pinctrl-single,bits = <0x0 0x0 0x30>; |
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| 60 | + }; |
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| 61 | + |
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| 62 | + pinmux_i2s_gpio: pinmux_i2s_gpio { |
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| 63 | + pinctrl-single,bits = <0x0 0x40 0xc0>; |
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| 64 | + }; |
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| 65 | + |
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| 66 | + pinmux_uart0_uart: pinmux_uart0_uart0 { |
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| 67 | + pinctrl-single,bits = <0x0 0x0 0x300>; |
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| 68 | + }; |
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| 69 | + |
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| 70 | + pinmux_sdmode_sdxc: pinmux_sdmode_sdxc { |
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| 71 | + pinctrl-single,bits = <0x0 0x0 0xc00>; |
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| 72 | + }; |
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| 73 | + |
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| 74 | + pinmux_sdmode_gpio: pinmux_sdmode_gpio { |
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| 75 | + pinctrl-single,bits = <0x0 0x400 0xc00>; |
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| 76 | + }; |
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| 77 | + |
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| 78 | + pinmux_spi_spi: pinmux_spi_spi { |
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| 79 | + pinctrl-single,bits = <0x0 0x0 0x1000>; |
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| 80 | + }; |
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| 81 | + |
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| 82 | + pinmux_refclk_gpio: pinmux_refclk_gpio { |
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| 83 | + pinctrl-single,bits = <0x0 0x40000 0x40000>; |
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| 84 | + }; |
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| 85 | + |
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| 86 | + pinmux_i2c_i2c: pinmux_i2c_i2c { |
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| 87 | + pinctrl-single,bits = <0x0 0x0 0x300000>; |
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| 88 | + }; |
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| 89 | + |
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| 90 | + pinmux_uart1_uart: pinmux_uart1_uart1 { |
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| 91 | + pinctrl-single,bits = <0x0 0x0 0x3000000>; |
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| 92 | + }; |
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| 93 | + |
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| 94 | + pinmux_uart2_uart: pinmux_uart2_uart { |
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| 95 | + pinctrl-single,bits = <0x0 0x0 0xc000000>; |
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| 96 | + }; |
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| 97 | + |
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| 98 | + pinmux_pwm0_pwm: pinmux_pwm0_pwm { |
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| 99 | + pinctrl-single,bits = <0x0 0x0 0x30000000>; |
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| 100 | + }; |
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| 101 | + |
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| 102 | + pinmux_pwm0_gpio: pinmux_pwm0_gpio { |
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| 103 | + pinctrl-single,bits = <0x0 0x10000000 |
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| 104 | + 0x30000000>; |
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| 105 | + }; |
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| 106 | + |
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| 107 | + pinmux_pwm1_pwm: pinmux_pwm1_pwm { |
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| 108 | + pinctrl-single,bits = <0x0 0x0 0xc0000000>; |
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| 109 | + }; |
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| 110 | + |
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| 111 | + pinmux_pwm1_gpio: pinmux_pwm1_gpio { |
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| 112 | + pinctrl-single,bits = <0x0 0x40000000 |
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| 113 | + 0xc0000000>; |
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| 114 | + }; |
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| 115 | + |
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| 116 | + pinmux_p0led_an_gpio: pinmux_p0led_an_gpio { |
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| 117 | + pinctrl-single,bits = <0x4 0x4 0xc>; |
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| 118 | + }; |
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| 119 | + |
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| 120 | + pinmux_p1led_an_gpio: pinmux_p1led_an_gpio { |
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| 121 | + pinctrl-single,bits = <0x4 0x10 0x30>; |
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| 122 | + }; |
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| 123 | + |
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| 124 | + pinmux_p2led_an_gpio: pinmux_p2led_an_gpio { |
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| 125 | + pinctrl-single,bits = <0x4 0x40 0xc0>; |
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| 126 | + }; |
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| 127 | + |
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| 128 | + pinmux_p3led_an_gpio: pinmux_p3led_an_gpio { |
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| 129 | + pinctrl-single,bits = <0x4 0x100 0x300>; |
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| 130 | + }; |
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| 131 | + |
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| 132 | + pinmux_p4led_an_gpio: pinmux_p4led_an_gpio { |
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| 133 | + pinctrl-single,bits = <0x4 0x400 0xc00>; |
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| 134 | + }; |
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| 135 | + }; |
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| 136 | + |
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| 137 | + watchdog: watchdog@100 { |
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| 138 | + compatible = "mediatek,mt7621-wdt"; |
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| 139 | + reg = <0x100 0x30>; |
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| 140 | + |
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| 141 | + resets = <&resetc 8>; |
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| 142 | + reset-names = "wdt"; |
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| 143 | + |
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| 144 | + interrupt-parent = <&intc>; |
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| 145 | + interrupts = <24>; |
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| 146 | + |
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| 147 | + status = "disabled"; |
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40 | 148 | }; |
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41 | 149 | |
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42 | 150 | intc: interrupt-controller@200 { |
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.. | .. |
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62 | 170 | reg = <0x300 0x100>; |
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63 | 171 | }; |
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64 | 172 | |
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| 173 | + gpio: gpio@600 { |
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| 174 | + compatible = "mediatek,mt7621-gpio"; |
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| 175 | + reg = <0x600 0x100>; |
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| 176 | + |
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| 177 | + gpio-controller; |
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| 178 | + interrupt-controller; |
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| 179 | + #gpio-cells = <2>; |
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| 180 | + #interrupt-cells = <2>; |
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| 181 | + |
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| 182 | + interrupt-parent = <&intc>; |
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| 183 | + interrupts = <6>; |
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| 184 | + }; |
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| 185 | + |
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| 186 | + spi: spi@b00 { |
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| 187 | + compatible = "ralink,mt7621-spi"; |
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| 188 | + reg = <0xb00 0x100>; |
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| 189 | + |
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| 190 | + pinctrl-names = "default"; |
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| 191 | + pinctrl-0 = <&pinmux_spi_spi>; |
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| 192 | + |
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| 193 | + resets = <&resetc 18>; |
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| 194 | + reset-names = "spi"; |
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| 195 | + |
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| 196 | + #address-cells = <1>; |
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| 197 | + #size-cells = <0>; |
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| 198 | + |
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| 199 | + status = "disabled"; |
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| 200 | + }; |
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| 201 | + |
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| 202 | + i2c: i2c@900 { |
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| 203 | + compatible = "mediatek,mt7621-i2c"; |
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| 204 | + reg = <0x900 0x100>; |
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| 205 | + |
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| 206 | + pinctrl-names = "default"; |
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| 207 | + pinctrl-0 = <&pinmux_i2c_i2c>; |
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| 208 | + |
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| 209 | + resets = <&resetc 16>; |
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| 210 | + reset-names = "i2c"; |
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| 211 | + |
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| 212 | + #address-cells = <1>; |
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| 213 | + #size-cells = <0>; |
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| 214 | + |
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| 215 | + status = "disabled"; |
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| 216 | + }; |
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| 217 | + |
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65 | 218 | uart0: uartlite@c00 { |
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66 | 219 | compatible = "ns16550a"; |
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67 | 220 | reg = <0xc00 0x100>; |
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| 221 | + |
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| 222 | + pinctrl-names = "default"; |
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| 223 | + pinctrl-0 = <&pinmux_uart0_uart>; |
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68 | 224 | |
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69 | 225 | resets = <&resetc 12>; |
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70 | 226 | reset-names = "uart0"; |
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.. | .. |
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79 | 235 | compatible = "ns16550a"; |
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80 | 236 | reg = <0xd00 0x100>; |
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81 | 237 | |
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| 238 | + pinctrl-names = "default"; |
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| 239 | + pinctrl-0 = <&pinmux_uart1_uart>; |
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| 240 | + |
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82 | 241 | resets = <&resetc 19>; |
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83 | 242 | reset-names = "uart1"; |
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84 | 243 | |
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.. | .. |
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91 | 250 | uart2: uart2@e00 { |
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92 | 251 | compatible = "ns16550a"; |
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93 | 252 | reg = <0xe00 0x100>; |
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| 253 | + |
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| 254 | + pinctrl-names = "default"; |
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| 255 | + pinctrl-0 = <&pinmux_uart2_uart>; |
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94 | 256 | |
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95 | 257 | resets = <&resetc 20>; |
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96 | 258 | reset-names = "uart2"; |
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.. | .. |
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123 | 285 | interrupt-parent = <&intc>; |
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124 | 286 | interrupts = <18>; |
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125 | 287 | }; |
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| 288 | + |
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| 289 | + wmac: wmac@10300000 { |
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| 290 | + compatible = "mediatek,mt7628-wmac"; |
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| 291 | + reg = <0x10300000 0x100000>; |
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| 292 | + |
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| 293 | + interrupt-parent = <&cpuintc>; |
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| 294 | + interrupts = <6>; |
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| 295 | + |
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| 296 | + status = "disabled"; |
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| 297 | + }; |
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126 | 298 | }; |
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