add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm64/include/asm/tlb.h
..
..
@@ -1,20 +1,9 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Based on arch/arm/include/asm/tlb.h
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  *
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  * Copyright (C) 2002 Russell King
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  * Copyright (C) 2012 ARM Ltd.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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  */
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 #ifndef __ASM_TLB_H
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 #define __ASM_TLB_H
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@@ -22,54 +11,82 @@
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 #include <linux/pagemap.h>
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 #include <linux/swap.h>
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13
 
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-#ifdef CONFIG_HAVE_RCU_TABLE_FREE
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-
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-#define tlb_remove_entry(tlb, entry)	tlb_remove_table(tlb, entry)
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 static inline void __tlb_remove_table(void *_table)
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 {
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 	free_page_and_swap_cache((struct page *)_table);
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 }
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-#else
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-#define tlb_remove_entry(tlb, entry)	tlb_remove_page(tlb, entry)
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-#endif /* CONFIG_HAVE_RCU_TABLE_FREE */
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18
 
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+#define tlb_flush tlb_flush
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 static void tlb_flush(struct mmu_gather *tlb);
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21
 
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 #include <asm-generic/tlb.h>
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23
 
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+/*
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+ * get the tlbi levels in arm64.  Default value is 0 if more than one
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+ * of cleared_* is set or neither is set.
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+ * Arm64 doesn't support p4ds now.
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+ */
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+static inline int tlb_get_level(struct mmu_gather *tlb)
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+{
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+	/* The TTL field is only valid for the leaf entry. */
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+	if (tlb->freed_tables)
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+		return 0;
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+
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+	if (tlb->cleared_ptes && !(tlb->cleared_pmds ||
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+				   tlb->cleared_puds ||
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+				   tlb->cleared_p4ds))
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+		return 3;
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+
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+	if (tlb->cleared_pmds && !(tlb->cleared_ptes ||
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+				   tlb->cleared_puds ||
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+				   tlb->cleared_p4ds))
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+		return 2;
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+
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+	if (tlb->cleared_puds && !(tlb->cleared_ptes ||
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+				   tlb->cleared_pmds ||
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+				   tlb->cleared_p4ds))
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+		return 1;
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+
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+	return 0;
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+}
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+
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 static inline void tlb_flush(struct mmu_gather *tlb)
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 {
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 	struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0);
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+	bool last_level = !tlb->freed_tables;
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+	unsigned long stride = tlb_get_unmap_size(tlb);
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+	int tlb_level = tlb_get_level(tlb);
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59
 
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 	/*
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-	 * The ASID allocator will either invalidate the ASID or mark
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-	 * it as used.
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+	 * If we're tearing down the address space then we only care about
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+	 * invalidating the walk-cache, since the ASID allocator won't
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+	 * reallocate our ASID without invalidating the entire TLB.
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 	 */
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-	if (tlb->fullmm)
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+	if (tlb->fullmm) {
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+		if (!last_level)
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+			flush_tlb_mm(tlb->mm);
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 		return;
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+	}
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70
 
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-	/*
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-	 * The intermediate page table levels are already handled by
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-	 * the __(pte|pmd|pud)_free_tlb() functions, so last level
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-	 * TLBI is sufficient here.
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-	 */
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-	__flush_tlb_range(&vma, tlb->start, tlb->end, true);
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+	__flush_tlb_range(&vma, tlb->start, tlb->end, stride,
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+			  last_level, tlb_level);
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 }
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 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
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 				  unsigned long addr)
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 {
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-	__flush_tlb_pgtable(tlb->mm, addr);
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-	pgtable_page_dtor(pte);
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-	tlb_remove_entry(tlb, pte);
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+	pgtable_pte_page_dtor(pte);
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+	tlb_remove_table(tlb, pte);
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 }
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 #if CONFIG_PGTABLE_LEVELS > 2
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 static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
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 				  unsigned long addr)
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 {
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-	__flush_tlb_pgtable(tlb->mm, addr);
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-	tlb_remove_entry(tlb, virt_to_page(pmdp));
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+	struct page *page = virt_to_page(pmdp);
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+
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+	pgtable_pmd_page_dtor(page);
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+	tlb_remove_table(tlb, page);
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 }
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 #endif
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..
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@@ -77,8 +94,7 @@
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 static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
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 				  unsigned long addr)
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 {
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-	__flush_tlb_pgtable(tlb->mm, addr);
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-	tlb_remove_entry(tlb, virt_to_page(pudp));
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+	tlb_remove_table(tlb, virt_to_page(pudp));
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 }
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 #endif
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