.. | .. |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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1 | 2 | /* |
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2 | 3 | * linux/arch/arm/mm/proc-v7m.S |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2008 ARM Ltd. |
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5 | 6 | * Copyright (C) 2001 Deep Blue Solutions Ltd. |
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6 | | - * |
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7 | | - * This program is free software; you can redistribute it and/or modify |
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8 | | - * it under the terms of the GNU General Public License version 2 as |
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9 | | - * published by the Free Software Foundation. |
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10 | 7 | * |
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11 | 8 | * This is the "shell" of the ARMv7-M processor support. |
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12 | 9 | */ |
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.. | .. |
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96 | 93 | ret lr |
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97 | 94 | ENDPROC(cpu_cm7_proc_fin) |
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98 | 95 | |
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99 | | - .section ".init.text", #alloc, #execinstr |
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| 96 | + .section ".init.text", "ax" |
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100 | 97 | |
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101 | 98 | __v7m_cm7_setup: |
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102 | 99 | mov r8, #(V7M_SCB_CCR_DC | V7M_SCB_CCR_IC| V7M_SCB_CCR_BP) |
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.. | .. |
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150 | 147 | |
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151 | 148 | @ Configure caches (if implemented) |
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152 | 149 | teq r8, #0 |
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153 | | - stmneia sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6 |
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| 150 | + stmiane sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6 |
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154 | 151 | blne v7m_invalidate_l1 |
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155 | 152 | teq r8, #0 @ re-evalutae condition |
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156 | | - ldmneia sp, {r0-r6, lr} |
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| 153 | + ldmiane sp, {r0-r6, lr} |
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157 | 154 | |
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158 | 155 | @ Configure the System Control Register to ensure 8-byte stack alignment |
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159 | 156 | @ Note the STKALIGN bit is either RW or RAO. |
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.. | .. |
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180 | 177 | string cpu_elf_name "v7m" |
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181 | 178 | string cpu_v7m_name "ARMv7-M" |
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182 | 179 | |
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183 | | - .section ".proc.info.init", #alloc |
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| 180 | + .section ".proc.info.init", "a" |
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184 | 181 | |
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185 | 182 | .macro __v7m_proc name, initfunc, cache_fns = nop_cache_fns, hwcaps = 0, proc_fns = v7m_processor_functions |
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186 | 183 | .long 0 /* proc_info_list.__cpu_mm_mmu_flags */ |
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