hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/arm/mm/proc-v7m.S
....@@ -1,12 +1,9 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23 * linux/arch/arm/mm/proc-v7m.S
34 *
45 * Copyright (C) 2008 ARM Ltd.
56 * Copyright (C) 2001 Deep Blue Solutions Ltd.
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
107 *
118 * This is the "shell" of the ARMv7-M processor support.
129 */
....@@ -96,7 +93,7 @@
9693 ret lr
9794 ENDPROC(cpu_cm7_proc_fin)
9895
99
- .section ".init.text", #alloc, #execinstr
96
+ .section ".init.text", "ax"
10097
10198 __v7m_cm7_setup:
10299 mov r8, #(V7M_SCB_CCR_DC | V7M_SCB_CCR_IC| V7M_SCB_CCR_BP)
....@@ -150,10 +147,10 @@
150147
151148 @ Configure caches (if implemented)
152149 teq r8, #0
153
- stmneia sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
150
+ stmiane sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
154151 blne v7m_invalidate_l1
155152 teq r8, #0 @ re-evalutae condition
156
- ldmneia sp, {r0-r6, lr}
153
+ ldmiane sp, {r0-r6, lr}
157154
158155 @ Configure the System Control Register to ensure 8-byte stack alignment
159156 @ Note the STKALIGN bit is either RW or RAO.
....@@ -180,7 +177,7 @@
180177 string cpu_elf_name "v7m"
181178 string cpu_v7m_name "ARMv7-M"
182179
183
- .section ".proc.info.init", #alloc
180
+ .section ".proc.info.init", "a"
184181
185182 .macro __v7m_proc name, initfunc, cache_fns = nop_cache_fns, hwcaps = 0, proc_fns = v7m_processor_functions
186183 .long 0 /* proc_info_list.__cpu_mm_mmu_flags */