add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/mach-spear/platsmp.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * arch/arm/mach-spear13xx/platsmp.c
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  *
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@@ -5,10 +6,6 @@
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  *
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  * Copyright (C) 2012 ST Microelectronics Ltd.
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  * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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 #include <linux/delay.h>
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@@ -20,19 +17,24 @@
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 #include <mach/spear.h>
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 #include "generic.h"
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+/* XXX spear_pen_release is cargo culted code - DO NOT COPY XXX */
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+volatile int spear_pen_release = -1;
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+
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 /*
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- * Write pen_release in a way that is guaranteed to be visible to all
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- * observers, irrespective of whether they're taking part in coherency
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+ * XXX CARGO CULTED CODE - DO NOT COPY XXX
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+ *
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+ * Write spear_pen_release in a way that is guaranteed to be visible to
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+ * all observers, irrespective of whether they're taking part in coherency
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  * or not.  This is necessary for the hotplug code to work reliably.
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  */
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-static void write_pen_release(int val)
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+static void spear_write_pen_release(int val)
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 {
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-	pen_release = val;
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+	spear_pen_release = val;
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 	smp_wmb();
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-	sync_cache_w(&pen_release);
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+	sync_cache_w(&spear_pen_release);
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 }
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-static DEFINE_RAW_SPINLOCK(boot_lock);
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+static DEFINE_SPINLOCK(boot_lock);
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 static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
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@@ -42,13 +44,13 @@
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 	 * let the primary processor know we're out of the
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 	 * pen, then head off into the C entry point
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 	 */
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-	write_pen_release(-1);
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+	spear_write_pen_release(-1);
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 	/*
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 	 * Synchronise with the boot thread.
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 	 */
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-	raw_spin_lock(&boot_lock);
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-	raw_spin_unlock(&boot_lock);
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+	spin_lock(&boot_lock);
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+	spin_unlock(&boot_lock);
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 }
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 static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
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@@ -59,22 +61,22 @@
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 	 * set synchronisation state between this boot processor
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 	 * and the secondary one
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 	 */
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-	raw_spin_lock(&boot_lock);
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+	spin_lock(&boot_lock);
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 	/*
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 	 * The secondary processor is waiting to be released from
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 	 * the holding pen - release it, then wait for it to flag
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-	 * that it has been released by resetting pen_release.
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+	 * that it has been released by resetting spear_pen_release.
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 	 *
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-	 * Note that "pen_release" is the hardware CPU ID, whereas
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+	 * Note that "spear_pen_release" is the hardware CPU ID, whereas
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 	 * "cpu" is Linux's internal ID.
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 	 */
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-	write_pen_release(cpu);
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+	spear_write_pen_release(cpu);
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 	timeout = jiffies + (1 * HZ);
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 	while (time_before(jiffies, timeout)) {
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 		smp_rmb();
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-		if (pen_release == -1)
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+		if (spear_pen_release == -1)
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 			break;
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 		udelay(10);
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@@ -84,9 +86,9 @@
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 	 * now the secondary core is starting up let it run its
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 	 * calibrations, then wait for it to finish
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 	 */
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-	raw_spin_unlock(&boot_lock);
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+	spin_unlock(&boot_lock);
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-	return pen_release != -1 ? -ENOSYS : 0;
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+	return spear_pen_release != -1 ? -ENOSYS : 0;
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 }
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 /*