.. | .. |
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5 | 5 | #include <linux/err.h> |
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6 | 6 | #include <linux/gpio/driver.h> |
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7 | 7 | #include <linux/gpio/gpio-reg.h> |
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| 8 | +#include <linux/gpio/machine.h> |
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8 | 9 | #include <linux/init.h> |
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9 | 10 | #include <linux/ioport.h> |
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10 | 11 | #include <linux/irq.h> |
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11 | 12 | #include <linux/kernel.h> |
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12 | 13 | #include <linux/module.h> |
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13 | | -#include <linux/platform_data/sa11x0-serial.h> |
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14 | 14 | #include <linux/platform_device.h> |
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15 | 15 | #include <linux/pm.h> |
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16 | 16 | #include <linux/serial_core.h> |
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.. | .. |
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20 | 20 | #include <asm/mach-types.h> |
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21 | 21 | #include <asm/mach/map.h> |
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22 | 22 | #include <asm/hardware/sa1111.h> |
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23 | | -#include <asm/sizes.h> |
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| 23 | +#include <linux/sizes.h> |
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24 | 24 | |
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25 | 25 | #include <mach/hardware.h> |
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26 | 26 | #include <mach/assabet.h> |
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.. | .. |
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48 | 48 | #define IRR_SA1111 (1 << 2) |
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49 | 49 | |
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50 | 50 | #define NCR_NGPIO 7 |
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51 | | - |
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52 | | -#define MDM_CTL0_RTS1 (1 << 0) |
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53 | | -#define MDM_CTL0_DTR1 (1 << 1) |
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54 | | -#define MDM_CTL0_RTS2 (1 << 2) |
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55 | | -#define MDM_CTL0_DTR2 (1 << 3) |
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56 | 51 | #define MDM_CTL0_NGPIO 4 |
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57 | | - |
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58 | | -#define MDM_CTL1_CTS1 (1 << 0) |
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59 | | -#define MDM_CTL1_DSR1 (1 << 1) |
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60 | | -#define MDM_CTL1_DCD1 (1 << 2) |
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61 | | -#define MDM_CTL1_CTS2 (1 << 3) |
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62 | | -#define MDM_CTL1_DSR2 (1 << 4) |
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63 | | -#define MDM_CTL1_DCD2 (1 << 5) |
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64 | 52 | #define MDM_CTL1_NGPIO 6 |
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65 | | - |
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66 | | -#define AUD_SEL_1341 (1 << 0) |
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67 | | -#define AUD_MUTE_1341 (1 << 1) |
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68 | 53 | #define AUD_NGPIO 2 |
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69 | 54 | |
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70 | 55 | extern void sa1110_mb_disable(void); |
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.. | .. |
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96 | 81 | struct gpio_chip *gpio[4]; |
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97 | 82 | }; |
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98 | 83 | |
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| 84 | +static struct gpiod_lookup_table neponset_uart1_gpio_table = { |
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| 85 | + .dev_id = "sa11x0-uart.1", |
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| 86 | + .table = { |
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| 87 | + GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW), |
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| 88 | + GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW), |
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| 89 | + GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW), |
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| 90 | + GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW), |
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| 91 | + GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW), |
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| 92 | + { }, |
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| 93 | + }, |
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| 94 | +}; |
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| 95 | + |
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| 96 | +static struct gpiod_lookup_table neponset_uart3_gpio_table = { |
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| 97 | + .dev_id = "sa11x0-uart.3", |
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| 98 | + .table = { |
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| 99 | + GPIO_LOOKUP("neponset-mdm-ctl0", 0, "rts", GPIO_ACTIVE_LOW), |
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| 100 | + GPIO_LOOKUP("neponset-mdm-ctl0", 1, "dtr", GPIO_ACTIVE_LOW), |
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| 101 | + GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW), |
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| 102 | + GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW), |
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| 103 | + GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW), |
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| 104 | + { }, |
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| 105 | + }, |
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| 106 | +}; |
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| 107 | + |
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| 108 | +static struct gpiod_lookup_table neponset_pcmcia_table = { |
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| 109 | + .dev_id = "1800", |
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| 110 | + .table = { |
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| 111 | + GPIO_LOOKUP("sa1111", 1, "a0vcc", GPIO_ACTIVE_HIGH), |
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| 112 | + GPIO_LOOKUP("sa1111", 0, "a1vcc", GPIO_ACTIVE_HIGH), |
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| 113 | + GPIO_LOOKUP("neponset-ncr", 5, "a0vpp", GPIO_ACTIVE_HIGH), |
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| 114 | + GPIO_LOOKUP("neponset-ncr", 6, "a1vpp", GPIO_ACTIVE_HIGH), |
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| 115 | + GPIO_LOOKUP("sa1111", 2, "b0vcc", GPIO_ACTIVE_HIGH), |
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| 116 | + GPIO_LOOKUP("sa1111", 3, "b1vcc", GPIO_ACTIVE_HIGH), |
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| 117 | + { }, |
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| 118 | + }, |
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| 119 | +}; |
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| 120 | + |
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99 | 121 | static struct neponset_drvdata *nep; |
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100 | 122 | |
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101 | 123 | void neponset_ncr_frob(unsigned int mask, unsigned int val) |
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.. | .. |
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109 | 131 | WARN(1, "nep unset\n"); |
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110 | 132 | } |
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111 | 133 | EXPORT_SYMBOL(neponset_ncr_frob); |
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112 | | - |
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113 | | -static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) |
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114 | | -{ |
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115 | | - struct neponset_drvdata *n = nep; |
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116 | | - unsigned long mask, val = 0; |
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117 | | - |
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118 | | - if (!n) |
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119 | | - return; |
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120 | | - |
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121 | | - if (port->mapbase == _Ser1UTCR0) { |
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122 | | - mask = MDM_CTL0_RTS2 | MDM_CTL0_DTR2; |
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123 | | - |
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124 | | - if (!(mctrl & TIOCM_RTS)) |
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125 | | - val |= MDM_CTL0_RTS2; |
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126 | | - |
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127 | | - if (!(mctrl & TIOCM_DTR)) |
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128 | | - val |= MDM_CTL0_DTR2; |
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129 | | - } else if (port->mapbase == _Ser3UTCR0) { |
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130 | | - mask = MDM_CTL0_RTS1 | MDM_CTL0_DTR1; |
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131 | | - |
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132 | | - if (!(mctrl & TIOCM_RTS)) |
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133 | | - val |= MDM_CTL0_RTS1; |
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134 | | - |
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135 | | - if (!(mctrl & TIOCM_DTR)) |
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136 | | - val |= MDM_CTL0_DTR1; |
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137 | | - } |
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138 | | - |
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139 | | - n->gpio[1]->set_multiple(n->gpio[1], &mask, &val); |
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140 | | -} |
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141 | | - |
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142 | | -static u_int neponset_get_mctrl(struct uart_port *port) |
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143 | | -{ |
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144 | | - void __iomem *base = nep->base; |
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145 | | - u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; |
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146 | | - u_int mdm_ctl1; |
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147 | | - |
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148 | | - if (!base) |
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149 | | - return ret; |
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150 | | - |
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151 | | - mdm_ctl1 = readb_relaxed(base + MDM_CTL_1); |
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152 | | - if (port->mapbase == _Ser1UTCR0) { |
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153 | | - if (mdm_ctl1 & MDM_CTL1_DCD2) |
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154 | | - ret &= ~TIOCM_CD; |
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155 | | - if (mdm_ctl1 & MDM_CTL1_CTS2) |
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156 | | - ret &= ~TIOCM_CTS; |
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157 | | - if (mdm_ctl1 & MDM_CTL1_DSR2) |
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158 | | - ret &= ~TIOCM_DSR; |
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159 | | - } else if (port->mapbase == _Ser3UTCR0) { |
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160 | | - if (mdm_ctl1 & MDM_CTL1_DCD1) |
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161 | | - ret &= ~TIOCM_CD; |
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162 | | - if (mdm_ctl1 & MDM_CTL1_CTS1) |
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163 | | - ret &= ~TIOCM_CTS; |
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164 | | - if (mdm_ctl1 & MDM_CTL1_DSR1) |
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165 | | - ret &= ~TIOCM_DSR; |
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166 | | - } |
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167 | | - |
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168 | | - return ret; |
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169 | | -} |
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170 | | - |
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171 | | -static struct sa1100_port_fns neponset_port_fns = { |
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172 | | - .set_mctrl = neponset_set_mctrl, |
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173 | | - .get_mctrl = neponset_get_mctrl, |
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174 | | -}; |
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175 | 134 | |
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176 | 135 | /* |
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177 | 136 | * Install handler for Neponset IRQ. Note that we have to loop here |
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.. | .. |
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374 | 333 | d->base + AUD_CTL, AUD_NGPIO, false, |
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375 | 334 | neponset_aud_names); |
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376 | 335 | |
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| 336 | + gpiod_add_lookup_table(&neponset_uart1_gpio_table); |
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| 337 | + gpiod_add_lookup_table(&neponset_uart3_gpio_table); |
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| 338 | + gpiod_add_lookup_table(&neponset_pcmcia_table); |
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| 339 | + |
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377 | 340 | /* |
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378 | 341 | * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately |
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379 | 342 | * something on the Neponset activates this IRQ on sleep (eth?) |
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.. | .. |
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385 | 348 | dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n", |
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386 | 349 | d->irq_base, d->irq_base + NEP_IRQ_NR - 1); |
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387 | 350 | nep = d; |
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388 | | - |
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389 | | - sa1100_register_uart_fns(&neponset_port_fns); |
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390 | 351 | |
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391 | 352 | /* Ensure that the memory bus request/grant signals are setup */ |
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392 | 353 | sa1110_mb_disable(); |
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.. | .. |
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424 | 385 | platform_device_unregister(d->sa1111); |
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425 | 386 | if (!IS_ERR(d->smc91x)) |
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426 | 387 | platform_device_unregister(d->smc91x); |
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| 388 | + |
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| 389 | + gpiod_remove_lookup_table(&neponset_pcmcia_table); |
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| 390 | + gpiod_remove_lookup_table(&neponset_uart3_gpio_table); |
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| 391 | + gpiod_remove_lookup_table(&neponset_uart1_gpio_table); |
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| 392 | + |
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427 | 393 | irq_set_chained_handler(irq, NULL); |
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428 | 394 | irq_free_descs(d->irq_base, NEP_IRQ_NR); |
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429 | 395 | nep = NULL; |
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