add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/mach-prima2/platsmp.c
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@@ -1,9 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * plat smp support for CSR Marco dual-core SMP SoCs
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  *
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  * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
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- *
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- * Licensed under GPLv2 or later.
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  */
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 #include <linux/init.h>
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@@ -22,7 +21,10 @@
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 static void __iomem *clk_base;
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-static DEFINE_RAW_SPINLOCK(boot_lock);
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+static DEFINE_SPINLOCK(boot_lock);
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+
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+/* XXX prima2_pen_release is cargo culted code - DO NOT COPY XXX */
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+volatile int prima2_pen_release = -1;
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 static void sirfsoc_secondary_init(unsigned int cpu)
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 {
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@@ -30,14 +32,14 @@
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 	 * let the primary processor know we're out of the
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 	 * pen, then head off into the C entry point
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 	 */
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-	pen_release = -1;
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+	prima2_pen_release = -1;
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 	smp_wmb();
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 	/*
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 	 * Synchronise with the boot thread.
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 	 */
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-	raw_spin_lock(&boot_lock);
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-	raw_spin_unlock(&boot_lock);
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+	spin_lock(&boot_lock);
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+	spin_unlock(&boot_lock);
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 }
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 static const struct of_device_id clk_ids[]  = {
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@@ -75,18 +77,18 @@
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 	/* make sure write buffer is drained */
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 	mb();
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-	raw_spin_lock(&boot_lock);
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+	spin_lock(&boot_lock);
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 	/*
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 	 * The secondary processor is waiting to be released from
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 	 * the holding pen - release it, then wait for it to flag
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-	 * that it has been released by resetting pen_release.
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+	 * that it has been released by resetting prima2_pen_release.
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 	 *
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-	 * Note that "pen_release" is the hardware CPU ID, whereas
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+	 * Note that "prima2_pen_release" is the hardware CPU ID, whereas
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 	 * "cpu" is Linux's internal ID.
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 	 */
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-	pen_release = cpu_logical_map(cpu);
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-	sync_cache_w(&pen_release);
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+	prima2_pen_release = cpu_logical_map(cpu);
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+	sync_cache_w(&prima2_pen_release);
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 	/*
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 	 * Send the secondary CPU SEV, thereby causing the boot monitor to read
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@@ -97,7 +99,7 @@
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 	timeout = jiffies + (1 * HZ);
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 	while (time_before(jiffies, timeout)) {
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 		smp_rmb();
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-		if (pen_release == -1)
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+		if (prima2_pen_release == -1)
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 			break;
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 		udelay(10);
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@@ -107,9 +109,9 @@
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 	 * now the secondary core is starting up let it run its
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 	 * calibrations, then wait for it to finish
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 	 */
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-	raw_spin_unlock(&boot_lock);
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+	spin_unlock(&boot_lock);
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-	return pen_release != -1 ? -ENOSYS : 0;
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+	return prima2_pen_release != -1 ? -ENOSYS : 0;
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 }
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 const struct smp_operations sirfsoc_smp_ops __initconst = {