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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/mach-mmp/regs-usb.h
....@@ -1,10 +1,6 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23  * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
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- *
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- * This program is free software; you can redistribute  it and/or modify it
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- * under  the terms of  the GNU General  Public License as published by the
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- * Free Software Foundation;  either version 2 of the  License, or (at your
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- * option) any later version.
84  */
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106 #ifndef __ASM_ARCH_REGS_USB_H
....@@ -124,100 +120,6 @@
124120 #define UTMI_RX_SQ_THRESH_MASK                  (0xf << 4)
125121 
126122 #define UTMI_OTG_ADDON_OTG_ON			(1 << 0)
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-
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-/* For MMP3 USB Phy */
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-#define USB2_PLL_REG0		0x4
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-#define USB2_PLL_REG1		0x8
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-#define USB2_TX_REG0		0x10
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-#define USB2_TX_REG1		0x14
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-#define USB2_TX_REG2		0x18
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-#define USB2_RX_REG0		0x20
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-#define USB2_RX_REG1		0x24
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-#define USB2_RX_REG2		0x28
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-#define USB2_ANA_REG0		0x30
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-#define USB2_ANA_REG1		0x34
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-#define USB2_ANA_REG2		0x38
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-#define USB2_DIG_REG0		0x3C
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-#define USB2_DIG_REG1		0x40
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-#define USB2_DIG_REG2		0x44
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-#define USB2_DIG_REG3		0x48
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-#define USB2_TEST_REG0		0x4C
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-#define USB2_TEST_REG1		0x50
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-#define USB2_TEST_REG2		0x54
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-#define USB2_CHARGER_REG0	0x58
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-#define USB2_OTG_REG0		0x5C
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-#define USB2_PHY_MON0		0x60
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-#define USB2_RESETVE_REG0	0x64
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-#define USB2_ICID_REG0		0x78
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-#define USB2_ICID_REG1		0x7C
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-
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-/* USB2_PLL_REG0 */
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-/* This is for Ax stepping */
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-#define USB2_PLL_FBDIV_SHIFT_MMP3		0
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-#define USB2_PLL_FBDIV_MASK_MMP3		(0xFF << 0)
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-
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-#define USB2_PLL_REFDIV_SHIFT_MMP3		8
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-#define USB2_PLL_REFDIV_MASK_MMP3		(0xF << 8)
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-
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-#define USB2_PLL_VDD12_SHIFT_MMP3		12
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-#define USB2_PLL_VDD18_SHIFT_MMP3		14
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-
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-/* This is for B0 stepping */
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-#define USB2_PLL_FBDIV_SHIFT_MMP3_B0		0
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-#define USB2_PLL_REFDIV_SHIFT_MMP3_B0		9
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-#define USB2_PLL_VDD18_SHIFT_MMP3_B0		14
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-#define USB2_PLL_FBDIV_MASK_MMP3_B0		0x01FF
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-#define USB2_PLL_REFDIV_MASK_MMP3_B0		0x3E00
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-
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-#define USB2_PLL_CAL12_SHIFT_MMP3		0
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-#define USB2_PLL_CALI12_MASK_MMP3		(0x3 << 0)
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-
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-#define USB2_PLL_VCOCAL_START_SHIFT_MMP3	2
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-
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-#define USB2_PLL_KVCO_SHIFT_MMP3		4
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-#define USB2_PLL_KVCO_MASK_MMP3			(0x7<<4)
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-
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-#define USB2_PLL_ICP_SHIFT_MMP3			8
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-#define USB2_PLL_ICP_MASK_MMP3			(0x7<<8)
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-
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-#define USB2_PLL_LOCK_BYPASS_SHIFT_MMP3		12
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-
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-#define USB2_PLL_PU_PLL_SHIFT_MMP3		13
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-#define USB2_PLL_PU_PLL_MASK			(0x1 << 13)
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-
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-#define USB2_PLL_READY_MASK_MMP3		(0x1 << 15)
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-
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-/* USB2_TX_REG0 */
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-#define USB2_TX_IMPCAL_VTH_SHIFT_MMP3		8
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-#define USB2_TX_IMPCAL_VTH_MASK_MMP3		(0x7 << 8)
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-
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-#define USB2_TX_RCAL_START_SHIFT_MMP3		13
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-
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-/* USB2_TX_REG1 */
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-#define USB2_TX_CK60_PHSEL_SHIFT_MMP3		0
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-#define USB2_TX_CK60_PHSEL_MASK_MMP3		(0xf << 0)
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-
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-#define USB2_TX_AMP_SHIFT_MMP3			4
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-#define USB2_TX_AMP_MASK_MMP3			(0x7 << 4)
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-
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-#define USB2_TX_VDD12_SHIFT_MMP3		8
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-#define USB2_TX_VDD12_MASK_MMP3			(0x3 << 8)
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-
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-/* USB2_TX_REG2 */
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-#define USB2_TX_DRV_SLEWRATE_SHIFT		10
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-
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-/* USB2_RX_REG0 */
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-#define USB2_RX_SQ_THRESH_SHIFT_MMP3		4
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-#define USB2_RX_SQ_THRESH_MASK_MMP3		(0xf << 4)
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-
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-#define USB2_RX_SQ_LENGTH_SHIFT_MMP3		10
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-#define USB2_RX_SQ_LENGTH_MASK_MMP3		(0x3 << 10)
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-
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-/* USB2_ANA_REG1*/
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-#define USB2_ANA_PU_ANA_SHIFT_MMP3		14
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-
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-/* USB2_OTG_REG0 */
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-#define USB2_OTG_PU_OTG_SHIFT_MMP3		3
221123 
222124 /* fsic registers */
223125 #define FSIC_MISC			0x4